yosys/techlibs
Clifford Wolf 5c933e5110
Merge pull request #1218 from ZirconiumX/synth_intel_iopads
intel: Make -noiopads the default
2019-07-25 17:19:54 +02:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
common gen_lut to return correctly sized LUT mask 2019-07-16 12:45:29 -07:00
coolrunner2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 synth_ecp5: rename dram to lutram everywhere. 2019-07-16 20:45:12 +00:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 ice40: Fix test_dsp_model.sh 2019-07-19 17:33:57 +01:00
intel intel: Make -noiopads the default 2019-07-24 10:38:15 +01:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx xilinx: Fix missing cell name underscore in cells_map.v 2019-07-25 08:19:07 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00