This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
530040ba6f
yosys
/
techlibs
/
altera_intel
History
Larry Doolittle
2021ddecb3
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
..
cycloneiv
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
max10
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
Makefile.inc
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
2017-04-05 23:01:29 -05:00
lpm_functions.v
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
synth_intel.cc
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00