mirror of https://github.com/YosysHQ/yosys.git
63 lines
2.0 KiB
C++
63 lines
2.0 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "kernel/register.h"
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#include "kernel/log.h"
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#include <stdlib.h>
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#include <stdio.h>
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struct ProcPass : public Pass {
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ProcPass() : Pass("proc", "translate processes to netlists") { }
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virtual void help()
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" proc [selection]\n");
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log("\n");
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log("This pass calls all the other proc_* passes in the most common order.\n");
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log("\n");
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log(" proc_clean\n");
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log(" proc_rmdead\n");
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log(" proc_arst\n");
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log(" proc_mux\n");
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log(" proc_dff\n");
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log(" proc_clean\n");
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log("\n");
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log("This replaces the processes in the design with multiplexers and flip-flops.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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{
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log_header("Executing PROC pass (convert processes to netlists).\n");
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log_push();
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extra_args(args, 1, design);
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Pass::call(design, "proc_clean");
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Pass::call(design, "proc_rmdead");
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Pass::call(design, "proc_arst");
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Pass::call(design, "proc_mux");
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Pass::call(design, "proc_dff");
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Pass::call(design, "proc_clean");
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log_pop();
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}
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} ProcPass;
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