yosys/passes
Claire Xenia Wolf 0516307637 Add "check -assert" to equiv_opt
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
2022-10-07 16:04:51 +02:00
..
cmds remove extra space in formating 2022-09-22 15:46:36 +01:00
equiv Add "check -assert" to equiv_opt 2022-10-07 16:04:51 +02:00
fsm Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
hierarchy Makes sure to set initial_top when change, fixes #3462 2022-08-26 17:12:56 +02:00
memory Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
opt Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
pmgen Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
proc proc_rom: Add special handling of const-0 address bits. 2022-05-18 17:32:30 +02:00
sat clk2fflogic: Always correctly handle simultaneously changing signals 2022-10-07 16:04:51 +02:00
techmap Fix crash in flowmap 2022-09-20 14:31:19 +02:00
tests Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00