yosys/passes
Eddie Hung 4e396ee7a3 abc9_ops: fix reintegration by removing optimised-away boxes 2020-01-09 11:21:03 -08:00
..
cmds scc to use design->selected_modules() which avoids black/white-boxes 2020-01-06 12:36:11 -08:00
equiv xilinx: Add xilinx_dffopt pass (#1557) 2019-12-18 13:43:43 +01:00
fsm Update fsm_detect bugfix 2019-11-12 17:31:30 +01:00
hierarchy Remove submod changes 2019-12-30 14:56:14 -08:00
memory Cleanup 2019-12-17 00:25:08 -08:00
opt Fix opt_expr.eqneq.cmpzero debug print 2019-12-15 20:40:38 +01:00
pmgen fixed invalid char 2019-12-25 20:38:48 +01:00
proc proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage 2019-11-21 20:46:41 +00:00
sat Fix sim for assignments with lhs<rhs size, fixes #1565 2019-12-17 17:36:30 +01:00
techmap abc9_ops: fix reintegration by removing optimised-away boxes 2020-01-09 11:21:03 -08:00
tests Document (* gentb_skip *) attr for test_autotb 2019-09-18 12:41:35 -07:00