yosys/techlibs/ice40/abc9_hx.box

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# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_hx8k.txt
# NB: Box inputs/outputs must each be in the same order
# as their corresponding module definition
# (with exceptions detailed below)
# Box 1 : $__ICE40_CARRY_WRAPPER (private cell used to preserve
# SB_LUT4+SB_CARRY)
# (Exception: carry chain input/output must be the
# last input and output and the entire bus has been
# moved there overriding the otherwise
# alphabetical ordering)
# name ID w/b ins outs
$__ICE40_CARRY_WRAPPER 1 1 5 2
#A B I0 I3 CI
400 379 449 316 316 # O
259 231 - - 126 # CO