.. |
bitpattern.h
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Using log_assert() instead of assert()
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2014-07-28 11:27:48 +02:00 |
calc.cc
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Added $shift and $shiftx cell types (needed for correct part select behavior)
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2014-07-29 16:35:13 +02:00 |
celltypes.h
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Added $shift and $shiftx cell types (needed for correct part select behavior)
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2014-07-29 16:35:13 +02:00 |
compatibility.cc
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Merged OSX fixes from Siesh1oo with some modifications
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2014-03-13 12:48:10 +01:00 |
compatibility.h
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Hotfix for kernel/compatibility.h
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2014-03-13 12:55:15 +01:00 |
consteval.h
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Using log_assert() instead of assert()
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2014-07-28 11:27:48 +02:00 |
driver.cc
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Added "yosys -A"
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2014-07-31 01:05:27 +02:00 |
log.cc
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Added "kernel/yosys.h" and "kernel/yosys.cc"
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2014-07-30 14:10:15 +02:00 |
log.h
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Added "log_dump_val_worker(char *v)"
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2014-07-30 15:58:21 +02:00 |
modwalker.h
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Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
register.cc
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Added write_file command
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2014-07-30 19:59:29 +02:00 |
register.h
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Added write_file command
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2014-07-30 19:59:29 +02:00 |
rtlil.cc
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Added "techmap -map %{design-name}"
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2014-07-29 16:35:13 +02:00 |
rtlil.h
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Added techmap CONSTMAP feature
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2014-07-30 22:04:30 +02:00 |
satgen.h
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Using native ezSAT shift ops in satgen, fixed $shift and $shiftx SAT models
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2014-07-30 18:37:17 +02:00 |
sigtools.h
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Using log_assert() instead of assert()
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2014-07-28 11:27:48 +02:00 |
toposort.h
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Added topological sorting to techmap
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2014-07-27 16:43:39 +02:00 |
yosys.cc
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Added "kernel/yosys.h" and "kernel/yosys.cc"
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2014-07-30 14:10:15 +02:00 |
yosys.h
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Added "kernel/yosys.h" and "kernel/yosys.cc"
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2014-07-30 14:10:15 +02:00 |