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ram block $__EFINIX_5K_ {
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abits 12;
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widths 1 2 5 10 20 per_port;
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cost 32;
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init no_undef;
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port sr "R" {
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clock anyedge;
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rden;
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|
}
|
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port sw "W" {
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clock anyedge;
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|
option "WRITE_MODE" "READ_FIRST" {
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|
wrtrans "R" old;
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|
}
|
|
option "WRITE_MODE" "WRITE_FIRST" {
|
|
wrtrans "R" new;
|
|
}
|
|
}
|
|
}
|