yosys/passes
Eddie Hung 3d9737c1bd Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-21 16:27:40 -08:00
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cmds autoname: do not autoname ports 2020-01-14 10:13:29 -08:00
equiv xilinx: Add xilinx_dffopt pass (#1557) 2019-12-18 13:43:43 +01:00
fsm fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks. 2020-01-14 22:49:20 +01:00
hierarchy Remove submod changes 2019-12-30 14:56:14 -08:00
memory Cleanup 2019-12-17 00:25:08 -08:00
opt Fix opt_expr.eqneq.cmpzero debug print 2019-12-15 20:40:38 +01:00
pmgen xilinx_dsp: another typo; move xilinx specific test 2020-01-17 17:07:03 -08:00
proc proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage 2019-11-21 20:46:41 +00:00
sat Add fminit pass 2020-01-09 21:22:54 +01:00
techmap abc9: add some log_{push,pop}() as per @nakengelhardt 2020-01-17 12:00:14 -08:00
tests Document (* gentb_skip *) attr for test_autotb 2019-09-18 12:41:35 -07:00