yosys/passes
Tony Min d41688f7d7
Revisions (#4)
* area should be 1 for all LUTs

* clean up macros

* add log_assert to fail noisily when encountering oddly configured DFF

* clean help msg

* flatten set to true by default

* update

* merge mult tests

* remove redundant test

* move all dsp tests to single file and remove redundant tests

* update ram tests

* add more dff tests

* fix c++20 compile errors

* add option to dump verilog

* default to use abc9

* remove -abc9 option since its the default now

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Co-authored-by: tony <minchunlin@gmail.com>
2024-07-08 10:57:16 -04:00
..
cmds Fix help message typo 2024-06-07 08:26:59 +02:00
equiv equiv_simple: Take FFs into account for driver map 2024-02-21 12:05:52 +01:00
fsm add option to fsm_detect to ignore self-resetting 2023-01-30 16:12:53 +01:00
hierarchy fix hierarchy -generate mode handling of cells 2024-04-12 13:38:33 +02:00
memory memory_map: Explain `-iattr` better 2024-03-06 15:15:37 +01:00
opt opt_lut_ins: fix name of global object. NFCI 2024-06-28 15:12:36 +00:00
pmgen Revisions (#4) 2024-07-08 10:57:16 -04:00
proc Merge pull request #4218 from kivikakk/proc_rom-actionless-switch 2024-02-19 16:21:40 +01:00
sat formalff -setundef: Fix handling for has_srst FFs 2024-04-15 11:53:30 +02:00
techmap cellmatch: add comments 2024-05-03 16:42:41 +02:00
tests Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00