mirror of https://github.com/YosysHQ/yosys.git
14 lines
483 B
Plaintext
14 lines
483 B
Plaintext
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In this directory contains an example for generating a spice output using two
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different spice modes, normal analog transient simulation and event-driven
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digital simulation as supported by ngspice xspice sub-module.
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Each test bench can be run separately by either running:
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- testbench.sh, to start analog simulation or
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- testbench_digital.sh for mixed-signal digital simulation.
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The later case also includes pure verilog simulation using the iverilog
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and gtkwave for comparison.
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