yosys/techlibs
Clifford Wolf 621787a9e0 Fix some c++ clang compiler errors 2017-07-03 19:38:30 +02:00
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altera_intel Squelch trailing whitespace 2017-04-12 15:11:09 +02:00
common Add dff2ff.v techmap file 2017-05-31 11:45:58 +02:00
coolrunner2 Fix some c++ clang compiler errors 2017-07-03 19:38:30 +02:00
gowin Indenting fixes in gowin sim cell lib 2016-11-08 18:54:00 +01:00
greenpak4 greenpak4_counters: Changed generation of primitive names so that the absorbed register's name is included 2017-06-24 14:54:07 -07:00
ice40 iCE40 flow is not experimental anymore 2016-11-01 11:32:02 +01:00
xilinx Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00