Zachary Snow 27257a419f verilog: strip leading and trailing spaces in macro args		2021-01-28 11:26:35 -05:00
..
aiger	Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().	2020-06-19 15:48:58 +00:00
ast	dpi: Support for chandle type	2021-01-23 22:24:31 +00:00
blif	Use C++11 final/override keywords.	2020-06-18 23:34:52 +00:00
json	Use C++11 final/override keywords.	2020-06-18 23:34:52 +00:00
liberty	Use C++11 final/override keywords.	2020-06-18 23:34:52 +00:00
rpc	Fix argument handling in connect_rpc	2020-10-19 13:40:57 +02:00
rtlil	rtlil: remove dotted identifiers.	2020-11-25 16:47:20 +00:00
verific	Switch verific bindings from Symbiotic EDA flavored Verific to YosysHQ flavored Verific	2021-01-20 20:48:10 +01:00
verilog	verilog: strip leading and trailing spaces in macro args	2021-01-28 11:26:35 -05:00