yosys/passes
Eddie Hung 3a39073302 Set more ports explicitly 2019-09-12 17:10:43 -07:00
..
cmds Fix select command error msg, fixes issue #1081 2019-09-01 11:00:09 +02:00
equiv Add equiv_opt -multiclock 2019-09-11 13:55:59 +01:00
fsm RTLIL::S{0,1} -> State::S{0,1} 2019-08-07 11:12:38 -07:00
hierarchy Adopt @cliffordwolf's suggestion 2019-09-03 12:18:50 -07:00
memory stoi -> atoi 2019-08-07 11:09:17 -07:00
opt passes: opt_share: don't statically initialize mergeable_type_map 2019-09-09 12:40:01 +08:00
pmgen Set more ports explicitly 2019-09-12 17:10:43 -07:00
proc proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
sat Add $dlatch support to async2sync 2019-08-28 09:45:22 +02:00
techmap Add -match-init option to dff2dffs. 2019-09-11 19:38:20 +02:00
tests Document (* gentb_skip *) attr for test_autotb 2019-09-06 13:28:15 -07:00