mirror of https://github.com/YosysHQ/yosys.git
236c69bed4
* this attempts to rewrite clock gating patterns into a form that is less likely to introduce combinational loops with clk2fflogic * can be disabled with -nopeepopt which is useful for testing clk2fflogic |
||
|---|---|---|
| .. | ||
| cmds | ||
| equiv | ||
| fsm | ||
| hierarchy | ||
| memory | ||
| opt | ||
| pmgen | ||
| proc | ||
| sat | ||
| techmap | ||
| tests | ||