Eddie Hung 543bd2de6c Update timings for Xilinx S7 cells		2019-12-30 14:36:07 -08:00
..
achronix	Revert "synth_* with -retime option now calls abc with -D 1 as well"	2019-04-18 07:59:16 -07:00
anlogic	make note that it is for latch mode	2019-09-18 17:48:16 +02:00
common	Do not map $eq and $ne in cmp2lut, only proper arithmetic cmp	2019-11-11 15:07:29 +01:00
coolrunner2	coolrunner2: remove spurious log_pop() call, fixes #1463	2019-11-23 06:21:40 +01:00
easic	Fix typographical and grammatical errors and inconsistencies.	2019-01-02 13:12:17 +00:00
ecp5	Nitpick cleanup for ecp5	2019-12-27 16:57:08 -08:00
efinix	FF should be initialized to 0	2019-10-04 13:27:10 +02:00
gowin	Use -match-init to not synth contradicting init values	2019-12-03 15:12:25 +01:00
greenpak4	Revert "synth_* with -retime option now calls abc with -D 1 as well"	2019-04-18 07:59:16 -07:00
ice40	Revert "Optimise write_xaiger"	2019-12-20 12:05:45 -08:00
intel	synth_intel: a10gx -> arria10gx	2019-12-10 13:48:10 +00:00
sf2	Add link to SF2 / igloo2 macro library guide	2019-03-07 09:08:26 -08:00
xilinx	Update timings for Xilinx S7 cells	2019-12-30 14:36:07 -08:00
.gitignore	added .gitignore files	2013-01-05 11:19:11 +01:00