mirror of https://github.com/YosysHQ/yosys.git
4e70c30775
- FfData now keeps track of the module and underlying cell, if any (so calling emit on FfData created from a cell will replace the existing cell) - FfData implementation is split off to its own .cc file for faster compilation - the "flip FF data sense by inserting inverters in front and after" functionality that zinit uses is moved onto FfData class and beefed up to have dffsr support, to support more use cases |
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|---|---|---|
| .. | ||
| Makefile.inc | ||
| assertpmux.cc | ||
| async2sync.cc | ||
| clk2fflogic.cc | ||
| cutpoint.cc | ||
| eval.cc | ||
| example.v | ||
| example.ys | ||
| expose.cc | ||
| fmcombine.cc | ||
| fminit.cc | ||
| freduce.cc | ||
| miter.cc | ||
| mutate.cc | ||
| qbfsat.cc | ||
| qbfsat.h | ||
| sat.cc | ||
| sim.cc | ||
| supercover.cc | ||