riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/passes
History
Emil J. Tywoniak 45880ea7f2 clockgate: add -liberty 2024-11-14 20:37:59 +01:00
..
cmds portarcs: New command to derive propagation arcs 2024-11-13 16:20:35 +01:00
equiv equiv_simple: Take FFs into account for driver map 2024-02-21 12:05:52 +01:00
fsm rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
hierarchy rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
memory rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
pmgen Merge pull request #4525 from georgerennie/peepopt_clock_gate 2024-11-11 14:49:09 +01:00
proc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
sat Merge pull request #4525 from georgerennie/peepopt_clock_gate 2024-11-11 14:49:09 +01:00
techmap clockgate: add -liberty 2024-11-14 20:37:59 +01:00
tests rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00