mirror of https://github.com/YosysHQ/yosys.git
147 lines
3.4 KiB
TeX
147 lines
3.4 KiB
TeX
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\section{Yosys by example -- Beyond Synthesis}
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\begin{frame}
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\sectionpage
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\end{frame}
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\begin{frame}{Overview}
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This section contains 3 subsections:
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\begin{itemize}
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\item Interactive Design Investigation
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\item Symbolic Model Checking
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\item Reverse Engineering
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\end{itemize}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\subsection{Interactive Design Investigation}
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\begin{frame}
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\subsectionpage
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\subsectionpagesuffix
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\end{frame}
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\begin{frame}{\subsecname}
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Yosys can also be used to investigate designs (or netlists created
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from other tools).
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\begin{itemize}
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\item
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The selection mechanism (see slides ``Using Selections''), especially pattern such
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as {\tt \%ci} and {\tt \%co}, can be used to figure out how parts of the design
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are connected.
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\item
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Commands such as {\tt submod}, {\tt expose}, {\tt splice}, \dots can be used
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to transform the design into an equivialent design that is easier to analyse.
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\item
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Commands such as {\tt eval} and {\tt sat} can be used to investigate the
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behavior of the circuit.
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\end{itemize}
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\end{frame}
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\begin{frame}[t, fragile]{Example: Reorganizing a module}
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\begin{columns}
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\column[t]{4cm}
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\lstinputlisting[basicstyle=\ttfamily\fontsize{6pt}{7pt}\selectfont, language=verilog]{PRESENTATION_ExOth/scrambler.v}
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\column[t]{7cm}
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\begin{lstlisting}[basicstyle=\ttfamily\fontsize{8pt}{10pt}\selectfont, language=ys, frame=single]
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read_verilog scrambler.v
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hierarchy; proc;;
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cd scrambler
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submod -name xorshift32 xs %c %ci %D \
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%c %ci:+[D] %D %ci*:-$dff \
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xs %co %ci %d
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\end{lstlisting}
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\end{columns}
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\hfil\includegraphics[width=11cm,trim=0 0cm 0 1.5cm]{PRESENTATION_ExOth/scrambler_p01.pdf}
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\hfil\includegraphics[width=11cm,trim=0 0cm 0 2cm]{PRESENTATION_ExOth/scrambler_p02.pdf}
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\end{frame}
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\begin{frame}[t, fragile]{Example: Analysis of circuit behavior}
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\begin{lstlisting}[basicstyle=\ttfamily\fontsize{8pt}{10pt}\selectfont, language=ys]
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> read_verilog scrambler.v
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> hierarchy; proc;; cd scrambler
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> submod -name xorshift32 xs %c %ci %D %c %ci:+[D] %D %ci*:-$dff xs %co %ci %d
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> cd xorshift32
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> rename n2 in
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> rename n1 out
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> eval -set in 1 -show out
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Eval result: \out = 270369.
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> eval -set in 270369 -show out
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Eval result: \out = 67634689.
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> sat -set out 632435482
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Signal Name Dec Hex Bin
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-------------------- ---------- ---------- -------------------------------------
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\in 745495504 2c6f5bd0 00101100011011110101101111010000
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\out 632435482 25b2331a 00100101101100100011001100011010
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\end{lstlisting}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\subsection{Symbolic Model Checking}
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\begin{frame}
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\subsectionpage
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\subsectionpagesuffix
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\end{frame}
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\subsubsection{TBD}
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\begin{frame}{\subsubsecname}
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TBD
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\subsection{Reverse Engineering}
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\begin{frame}
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\subsectionpage
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\subsectionpagesuffix
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\end{frame}
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\subsubsection{TBD}
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\begin{frame}{\subsubsecname}
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TBD
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\subsection{Summary}
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\begin{frame}{\subsecname}
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\begin{itemize}
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\item TBD
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\item TBD
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\item TBD
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\item TBD
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\end{itemize}
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\bigskip
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\bigskip
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\begin{center}
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Questions?
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\end{center}
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\bigskip
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\bigskip
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\begin{center}
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\url{http://www.clifford.at/yosys/}
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\end{center}
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\end{frame}
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