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17812a1560
yosys
/
techlibs
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intel
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cycloneive
History
Marcelina Kościelnicka
3209c0762a
intel: Use dfflegalize.
2020-07-13 19:21:05 +02:00
..
arith_map.v
Add force_downto and force_upto wire attributes.
2020-05-19 01:42:40 +02:00
cells_map.v
intel: Use dfflegalize.
2020-07-13 19:21:05 +02:00
cells_sim.v
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00