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34 lines
665 B
Plaintext
34 lines
665 B
Plaintext
# Block RAMs for Virtex 2, Spartan 3, Spartan 3E, Spartan 3A(N)
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# The corresponding mapping file is brams_xc2v_map.v
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ram block $__XILINX_BLOCKRAM_ {
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abits 14;
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widths 1 2 4 9 18 36 per_port;
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ifdef HAS_BE {
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option "USE_BE" 1 byte 9;
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}
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cost 129;
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init any;
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port srsw "A" "B" {
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option "USE_BE" 0 width tied;
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ifdef HAS_BE {
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option "USE_BE" 1 width tied 9 18 36;
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}
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clock posedge;
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clken;
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rdsrst any gated_clken;
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rdinit any;
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portoption "WRITE_MODE" "NO_CHANGE" {
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rdwr no_change;
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}
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portoption "WRITE_MODE" "WRITE_FIRST" {
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rdwr new_only;
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}
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portoption "WRITE_MODE" "READ_FIRST" {
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rdwr old;
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wrtrans all old;
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}
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optional;
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}
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}
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