mirror of https://github.com/YosysHQ/yosys.git
257 lines
10 KiB
Verilog
257 lines
10 KiB
Verilog
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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// ============================================================================
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// FF mapping for Spartan 6. The primitives used are the same as Series 7,
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// but with one major difference: the initial value is implied by the
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// primitive type used (FFs with reset pin must have INIT set to 0 or x, FFs
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// with set pin must have INIT set to 1 or x). For Yosys primitives without
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// set/reset, this means we have to pick the primitive type based on the INIT
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// value.
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`ifndef _NO_FFS
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// No reset.
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module \$_DFF_N_ (input D, C, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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FDSE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .S(1'b0));
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else
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FDRE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFF_P_ (input D, C, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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FDSE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .S(1'b0));
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else
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FDRE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// No reset, enable.
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module \$_DFFE_NP_ (input D, C, E, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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FDSE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .S(1'b0));
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else
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FDRE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFFE_PP_ (input D, C, E, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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FDSE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .S(1'b0));
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else
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FDRE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Async reset.
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module \$_DFF_NP0_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with asynchronous reset initialized to 1");
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else
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FDCE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .CLR( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFF_PP0_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with asynchronous reset initialized to 1");
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else
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FDCE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .CLR( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFF_NP1_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with asynchronous set initialized to 0");
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else
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FDPE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .PRE( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFF_PP1_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with asynchronous set initialized to 0");
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else
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FDPE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .PRE( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Async reset, enable.
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module \$_DFFE_NP0P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with asynchronous reset initialized to 1");
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else
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FDCE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .CLR( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFFE_PP0P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with asynchronous reset initialized to 1");
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else
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FDCE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .CLR( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFFE_NP1P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with asynchronous set initialized to 0");
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else
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FDPE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .PRE( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DFFE_PP1P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with asynchronous set initialized to 0");
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else
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FDPE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .PRE( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Sync reset.
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module \$_SDFF_NP0_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with reset initialized to 1");
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else
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FDRE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFF_PP0_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with reset initialized to 1");
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else
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FDRE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFF_NP1_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with set initialized to 0");
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else
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FDSE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .S( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFF_PP1_ (input D, C, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with set initialized to 0");
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else
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FDSE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .S( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Sync reset, enable.
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module \$_SDFFE_NP0P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with reset initialized to 1");
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else
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FDRE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFFE_PP0P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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$error("Spartan 6 doesn't support FFs with reset initialized to 1");
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else
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FDRE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .R( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFFE_NP1P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with set initialized to 0");
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else
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FDSE_1 #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .S( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_SDFFE_PP1P_ (input D, C, E, R, output Q);
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parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b0)
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$error("Spartan 6 doesn't support FFs with set initialized to 0");
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else
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FDSE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(E), .S( R));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Latches (no reset).
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module \$_DLATCH_N_ (input E, D, output Q);
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parameter _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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LDPE #(.INIT(_TECHMAP_WIREINIT_Q_), .IS_G_INVERTED(1'b1)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .G(E), .GE(1'b1), .PRE(1'b0));
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else
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LDCE #(.INIT(_TECHMAP_WIREINIT_Q_), .IS_G_INVERTED(1'b1)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .G(E), .GE(1'b1), .CLR(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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module \$_DLATCH_P_ (input E, D, output Q);
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parameter _TECHMAP_WIREINIT_Q_ = 1'bx;
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generate if (_TECHMAP_WIREINIT_Q_ === 1'b1)
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LDPE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .G(E), .GE(1'b1), .PRE(1'b0));
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else
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LDCE #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .G(E), .GE(1'b1), .CLR(1'b0));
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endgenerate
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wire _TECHMAP_REMOVEINIT_Q_ = 1;
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endmodule
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// Latches with reset (TODO).
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`endif
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