riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/backends/ilang
History
Clifford Wolf 53655d173b Added $global_clock verilog syntax support for creating $ff cells 2016-10-14 12:33:56 +02:00
..
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
ilang_backend.cc Added $global_clock verilog syntax support for creating $ff cells 2016-10-14 12:33:56 +02:00
ilang_backend.h Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00