yosys/tests/hana/test_simulation_techmap_nand_2_tech.v

module TECH_NAND18(input [17:0] in, output out);
assign out = ~(&in);
endmodule

module TECH_NAND4(input [3:0] in, output out);
assign out = ~(&in);
endmodule

module TECH_NAND2(input [1:0] in, output out);
assign out = ~(&in);
endmodule