yosys/tests/arch/microchip
Tony Min d41688f7d7
Revisions (#4)
* area should be 1 for all LUTs

* clean up macros

* add log_assert to fail noisily when encountering oddly configured DFF

* clean help msg

* flatten set to true by default

* update

* merge mult tests

* remove redundant test

* move all dsp tests to single file and remove redundant tests

* update ram tests

* add more dff tests

* fix c++20 compile errors

* add option to dump verilog

* default to use abc9

* remove -abc9 option since its the default now

---------

Co-authored-by: tony <minchunlin@gmail.com>
2024-07-08 10:57:16 -04:00
..
.gitignore add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
dff.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
dff_opt.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
dff_opt.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
dsp.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
mult.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
ram_SDP.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
ram_SDP.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
ram_TDP.v Revisions (#4) 2024-07-08 10:57:16 -04:00
ram_TDP.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
reduce.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
reduce.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
run-test.sh add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
simple_ram.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
uram_ar.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
uram_ar.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
uram_sr.v Add missing u sram init (#3) 2024-07-04 16:39:10 -04:00
uram_sr.ys Revisions (#4) 2024-07-08 10:57:16 -04:00
widemux.v add assertions for synth_microchip tests 2024-07-04 15:45:44 -04:00
widemux.ys Revisions (#4) 2024-07-08 10:57:16 -04:00