yosys/passes
Clifford Wolf 0a840dd883 Fix handling of (* keep *) wires in wreduce
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-12-31 16:37:40 +01:00
..
cmds Merge pull request #736 from whitequark/select_assert_list 2018-12-16 16:45:49 +01:00
equiv Fix equiv_opt indenting 2018-12-16 15:57:28 +01:00
fsm Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
hierarchy Refactor code to avoid code duplication + added comments 2018-10-20 16:06:48 +02:00
memory memory_collect: do not truncate 'x from \INIT. 2018-12-21 02:01:27 +00:00
opt Fix handling of (* keep *) wires in wreduce 2018-12-31 16:37:40 +01:00
proc proc_clean: remove any empty cases if all cases use all-def compare. 2018-12-23 09:04:30 +00:00
sat Fixed minor typo in "sim" help message 2018-09-12 18:34:27 -04:00
techmap Revert "Proof-of-concept: preserve naming through ABC using dress" 2018-12-16 21:27:31 +01:00
tests Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00