aiger
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xaiger: remove some unnecessary operations ...
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2020-03-06 10:51:47 -08:00 |
blif
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RTLIL::S{0,1} -> State::S{0,1}
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2019-08-07 11:12:38 -07:00 |
firrtl
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remove include where not used
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2020-03-13 14:55:53 +01:00 |
intersynth
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substr() -> compare()
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2019-08-07 12:20:08 -07:00 |
protobuf
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Add aiger and protobuf backends binary support
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2019-09-28 09:51:48 +02:00 |
smv
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substr() -> compare()
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2019-08-07 12:20:08 -07:00 |
spice
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Add "whitebox" attribute, add "read_verilog -wb"
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2019-04-18 17:45:47 +02:00 |
table
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Add "whitebox" attribute, add "read_verilog -wb"
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2019-04-18 17:45:47 +02:00 |