Eddie Hung cfb0366a18 Import tests from #1628		2020-01-27 13:56:16 -08:00
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.gitignore	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
add_sub.ys	Share common tests	2019-10-18 12:19:59 +02:00
adffs.ys	Share common tests	2019-10-18 12:19:59 +02:00
bug1597.ys	Import tests from #1628	2020-01-27 13:56:16 -08:00
bug1598.ys	Add #1598 testcase	2019-12-27 16:44:57 -08:00
bug1626.ys	Add #1626 testcase	2020-01-12 15:21:26 -08:00
bug1644.il.gz	Add #1644 testcase	2020-01-17 15:57:52 -08:00
bug1644.ys	Add #1644 testcase	2020-01-17 15:57:52 -08:00
counter.ys	Call equiv_opt with -multiclock and -assert	2019-12-31 18:39:32 -08:00
dffs.ys	Share common tests	2019-10-18 12:19:59 +02:00
dpram.v	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
dpram.ys	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
fsm.ys	Fixed tests	2019-11-11 15:41:33 +01:00
ice40_dsp.ys	ice40_dsp: add test	2020-01-17 15:38:26 -08:00
ice40_opt.ys	Import tests from #1628	2020-01-27 13:56:16 -08:00
ice40_wrapcarry.ys	ice40_wrapcarry to really preserve attributes via -unwrap option	2019-12-09 11:48:28 -08:00
latches.ys	Share common tests	2019-10-18 12:19:59 +02:00
logic.ys	Share common tests	2019-10-18 12:19:59 +02:00
lutram.ys	Rename memory tests to lutram, add more xilinx tests	2019-12-12 17:44:37 -08:00
macc.v	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
macc.ys	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
mul.ys	Fix warnings	2019-12-31 18:40:11 -08:00
mux.ys	Share common tests	2019-10-18 12:19:59 +02:00
rom.v	Revert insertion of 'reg', leave note behind	2020-01-01 09:05:46 -08:00
rom.ys	Moved all tests in arch sub directory	2019-10-18 11:06:12 +02:00
run-test.sh	Fix path to yosys	2019-10-18 11:12:03 +02:00
shifter.ys	Share common tests	2019-10-18 12:19:59 +02:00
tribuf.ys	Share common tests	2019-10-18 12:19:59 +02:00