yosys/passes
David Shah 4bfd2ef4f3 sv: Improve handling of wildcard port connections
Signed-off-by: David Shah <dave@ds0.me>
2020-02-02 16:12:33 +00:00
..
cmds redirect fuser stderr to /dev/null 2020-01-28 10:02:41 +01:00
equiv xilinx: Add xilinx_dffopt pass (#1557) 2019-12-18 13:43:43 +01:00
fsm fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks. 2020-01-14 22:49:20 +01:00
hierarchy sv: Improve handling of wildcard port connections 2020-02-02 16:12:33 +00:00
memory Cleanup 2019-12-17 00:25:08 -08:00
opt Merge branch 'vector_fix' of https://github.com/Kmanfi/yosys 2020-01-29 17:01:24 +01:00
pmgen Merge pull request #1657 from YosysHQ/dave/xilinx-dsp-multonly 2020-02-02 14:53:32 +00:00
proc proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage 2019-11-21 20:46:41 +00:00
sat Merge pull request #1567 from YosysHQ/eddie/sat_init_warning 2020-01-28 17:40:28 +01:00
techmap abc9: restore ability to use ABCEXTERNAL 2020-01-30 15:12:43 -05:00
tests Document (* gentb_skip *) attr for test_autotb 2019-09-18 12:41:35 -07:00