mirror of https://github.com/YosysHQ/yosys.git
78 lines
3.5 KiB
Bash
78 lines
3.5 KiB
Bash
#!/bin/bash
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set -ex
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../../yosys -p 'read_verilog initial_display.v' | awk '/<<<BEGIN>>>/,/<<<END>>>/ {print $0}' >yosys-initial_display.log
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iverilog -o iverilog-initial_display initial_display.v
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./iverilog-initial_display >iverilog-initial_display.log
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diff yosys-initial_display.log iverilog-initial_display.log
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test_always_display () {
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local subtest=$1; shift
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../../yosys -p "read_verilog $* always_display.v; proc; opt_expr -mux_bool; clean" -o yosys-always_display-${subtest}-1.v
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../../yosys -p "read_verilog yosys-always_display-${subtest}-1.v; proc; opt_expr -mux_bool; clean" -o yosys-always_display-${subtest}-2.v
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diff yosys-always_display-${subtest}-1.v yosys-always_display-${subtest}-2.v
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}
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test_always_display clk -DEVENT_CLK
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test_always_display clk_rst -DEVENT_CLK_RST
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test_always_display star -DEVENT_STAR
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test_always_display clk_en -DEVENT_CLK -DCOND_EN
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test_always_display clk_rst_en -DEVENT_CLK_RST -DCOND_EN
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test_always_display star_en -DEVENT_STAR -DCOND_EN
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test_roundtrip () {
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local subtest=$1; shift
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../../yosys -p "read_verilog $* roundtrip.v; proc; clean" -o yosys-roundtrip-${subtest}-1.v
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../../yosys -p "read_verilog yosys-roundtrip-${subtest}-1.v; proc; clean" -o yosys-roundtrip-${subtest}-2.v
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diff yosys-roundtrip-${subtest}-1.v yosys-roundtrip-${subtest}-2.v
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iverilog $* -o iverilog-roundtrip-${subtest} roundtrip.v roundtrip_tb.v
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./iverilog-roundtrip-${subtest} >iverilog-roundtrip-${subtest}.log
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iverilog $* -o iverilog-roundtrip-${subtest}-1 yosys-roundtrip-${subtest}-1.v roundtrip_tb.v
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./iverilog-roundtrip-${subtest}-1 >iverilog-roundtrip-${subtest}-1.log
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iverilog $* -o iverilog-roundtrip-${subtest}-2 yosys-roundtrip-${subtest}-2.v roundtrip_tb.v
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./iverilog-roundtrip-${subtest}-1 >iverilog-roundtrip-${subtest}-2.log
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diff iverilog-roundtrip-${subtest}.log iverilog-roundtrip-${subtest}-1.log
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diff iverilog-roundtrip-${subtest}-1.log iverilog-roundtrip-${subtest}-2.log
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}
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test_roundtrip dec_unsigned -DBASE_DEC -DSIGN=""
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test_roundtrip dec_signed -DBASE_DEC -DSIGN="signed"
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test_roundtrip hex_unsigned -DBASE_HEX -DSIGN=""
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test_roundtrip hex_signed -DBASE_HEX -DSIGN="signed"
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test_roundtrip oct_unsigned -DBASE_HEX -DSIGN=""
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test_roundtrip oct_signed -DBASE_HEX -DSIGN="signed"
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test_roundtrip bin_unsigned -DBASE_HEX -DSIGN=""
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test_roundtrip bin_signed -DBASE_HEX -DSIGN="signed"
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test_cxxrtl () {
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local subtest=$1; shift
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../../yosys -p "read_verilog ${subtest}.v; proc; clean; write_cxxrtl -print-output std::cerr yosys-${subtest}.cc"
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${CC:-gcc} -std=c++11 -o yosys-${subtest} -I../.. ${subtest}_tb.cc -lstdc++
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./yosys-${subtest} 2>yosys-${subtest}.log
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iverilog -o iverilog-${subtest} ${subtest}.v ${subtest}_tb.v
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./iverilog-${subtest} |grep -v '\$finish called' >iverilog-${subtest}.log
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diff iverilog-${subtest}.log yosys-${subtest}.log
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}
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test_cxxrtl always_full
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test_cxxrtl always_comb
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# Ensure Verilog backend preserves behaviour of always block with multiple $displays.
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../../yosys -p "read_verilog always_full.v; prep; clean" -o yosys-always_full-1.v
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iverilog -o iverilog-always_full-1 yosys-always_full-1.v always_full_tb.v
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./iverilog-always_full-1 |grep -v '\$finish called' >iverilog-always_full-1.log
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diff iverilog-always_full.log iverilog-always_full-1.log
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../../yosys -p "read_verilog display_lm.v" >yosys-display_lm.log
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../../yosys -p "read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc"
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${CC:-gcc} -std=c++11 -o yosys-display_lm_cc -I../.. display_lm_tb.cc -lstdc++
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./yosys-display_lm_cc >yosys-display_lm_cc.log
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for log in yosys-display_lm.log yosys-display_lm_cc.log; do
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grep "^%l: \\\\bot\$" "$log"
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grep "^%m: \\\\bot\$" "$log"
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done
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