mirror of https://github.com/YosysHQ/yosys.git
17 lines
369 B
Plaintext
17 lines
369 B
Plaintext
verific -cfg db_abstract_case_statement_synthesis 0
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read -sv range_case.sv
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verific -import top
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proc
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rename top gold
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verific -cfg db_abstract_case_statement_synthesis 1
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read -sv range_case.sv
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verific -import top
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proc
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rename top gate
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miter -equiv -flatten -make_assert gold gate miter
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prep -top miter
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clk2fflogic
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sat -set-init-zero -tempinduct -prove-asserts -verify
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