mirror of https://github.com/YosysHQ/yosys.git
21 lines
440 B
Plaintext
21 lines
440 B
Plaintext
read_verilog -formal <<EOT
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module top;
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foo bar();
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foo asdf();
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winnie the_pooh();
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wire [1023:0] _RUNME0 = "select -assert-count 2 t:foo";
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wire [1023:0] _RUNME1 = "select -assert-count 1 t:winnie";
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endmodule
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module other;
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wire [1023:0] _DELETE = "cd; delete c:bar";
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endmodule
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EOT
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script -scriptwire w:_RUNME*
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select w:_DELETE
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script -scriptwire
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select -assert-count 1 t:foo
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