mirror of https://github.com/YosysHQ/yosys.git
18 lines
474 B
Plaintext
18 lines
474 B
Plaintext
read_verilog share.v
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proc;;
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copy test_1 gold_1
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copy test_2 gold_2
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share test_1 test_2;;
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select -assert-count 1 test_1/t:$mul
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select -assert-count 1 test_2/t:$mul
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select -assert-count 1 test_2/t:$div
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miter -equiv -flatten -make_outputs -make_outcmp gold_1 test_1 miter_1
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sat -verify -prove trigger 0 -show-inputs -show-outputs miter_1
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miter -equiv -flatten -make_outputs -make_outcmp gold_2 test_2 miter_2
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sat -verify -prove trigger 0 -show-inputs -show-outputs miter_2
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