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04a087ece5
Author | SHA1 | Date |
---|---|---|
Larry Doolittle | 04a087ece5 | |
Miodrag Milanović | 29e8812bab | |
Miodrag Milanović | 9512ec4bbc | |
Miodrag Milanovic | d6bd521487 | |
Larry Doolittle | 3ae9ca7c2b | |
Miodrag Milanovic | df391f5816 | |
Larry Doolittle | d36a387aca |
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@ -2126,12 +2126,6 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
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log(" assert condition %s.\n", log_signal(cond));
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Cell *cell = module->addAssert(new_verific_id(inst), cond, State::S1);
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// Initialize FF feeding condition to 1, in case it is not
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// used by rest of design logic, to prevent failing on
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// initial uninitialized state
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if (cond.is_wire() && !cond.wire->name.isPublic())
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cond.wire->attributes[ID::init] = Const(1,1);
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import_attributes(cell->attributes, inst);
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continue;
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}
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@ -3428,6 +3422,7 @@ struct VerificPass : public Pass {
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RuntimeFlags::SetVar("veri_preserve_assignments", 1);
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RuntimeFlags::SetVar("veri_preserve_comments", 1);
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RuntimeFlags::SetVar("veri_preserve_drivers", 1);
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RuntimeFlags::SetVar("veri_create_empty_box", 1);
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// Workaround for VIPER #13851
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RuntimeFlags::SetVar("veri_create_name_for_unnamed_gen_block", 1);
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@ -364,7 +364,7 @@ public:
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unsigned int hash() const
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{
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unsigned int inner;
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unsigned int inner = 0;
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switch (type_)
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{
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case DriveType::NONE:
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@ -385,6 +385,9 @@ public:
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case DriveType::MULTIPLE:
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inner = multiple_.hash();
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break;
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default:
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log_abort();
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break;
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}
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return mkhash((unsigned int)type_, inner);
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}
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@ -912,7 +915,7 @@ public:
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unsigned int hash() const
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{
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unsigned int inner;
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unsigned int inner = 0;
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switch (type_)
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{
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case DriveType::NONE:
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@ -933,6 +936,9 @@ public:
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case DriveType::MULTIPLE:
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inner = multiple_.hash();
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break;
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default:
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log_abort();
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break;
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}
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return mkhash((unsigned int)type_, inner);
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}
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@ -0,0 +1,24 @@
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verific -sv -lib <<EOF
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module TEST_CELL(input clk, input a, input b, output reg c);
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parameter PATH = "DEFAULT";
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always @(posedge clk) begin
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if (PATH=="DEFAULT")
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c <= a;
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else
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c <= b;
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end
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endmodule
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EOF
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verific -sv <<EOF
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module top(input clk, input a, input b, output c, output d);
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TEST_CELL #(.PATH("TEST")) test1(.clk(clk),.a(a),.b(1'b1),.c(c));
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TEST_CELL #(.PATH("DEFAULT")) test2(.clk(clk),.a(a),.b(1'bx),.c(d));
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endmodule
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EOF
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verific -import top
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hierarchy -top top
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stat
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select -assert-count 2 t:TEST_CELL
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