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12 Commits

Author SHA1 Message Date
N. Engelhardt 44b0e57a5a
Merge df72f30141 into 6f3376cbe6 2024-11-28 12:24:15 +01:00
KrystalDelusion 6f3376cbe6
Merge pull request #4730 from YosysHQ/krys/downstream-docs
Improvements for downstream-distro maintainability.
2024-11-28 14:35:16 +13:00
github-actions[bot] 87742fa688 Bump version 2024-11-28 01:26:26 +00:00
Martin Povišer 646c5a19a8
Merge pull request #4776 from YosysHQ/krys/get_blackbox_attribute
Move get_blackbox_attribute method to Module instead of AttrObject
2024-11-28 00:25:16 +01:00
Martin Povišer 1717a0b9c0
Merge pull request #4721 from ldoolitt/main
kernel/drivertools.h: avoid maybe-uninitialized compile warnings
2024-11-28 00:09:43 +01:00
KrystalDelusion f428163252
Move get_blackbox_attribute method to Module instead of AttrObject 2024-11-28 11:19:16 +13:00
Krystine Sherwin e649c1a8e1
Docs: Accept empty string for release envvar 2024-11-20 12:31:12 +13:00
Krystine Sherwin 44b68fb498
Docs: Add check for envvar to disable todos 2024-11-20 12:18:17 +13:00
Krystine Sherwin 1476eaba00
Docs: Add fallback for missing furo_ys
This is mainly intended for (latex)pdf builds which do not use the furo-ys html theme, where the yosys script syntax highlighting can safely fallback to plaintext.  This effectively makes `furo-ys` an optional dependency to simplify distro-package maintainability.
See also #4725.
2024-11-12 16:23:12 +13:00
N. Engelhardt df72f30141 synth_quicklogic: add -noflatten option 2024-11-11 11:22:05 +01:00
Larry Doolittle 3ae9ca7c2b drivertools.h: switch from log_assert(0) to log_abort() for new feature 2024-11-08 10:30:11 -08:00
Larry Doolittle d36a387aca kernel/drivertools.h: avoid maybe-uninitialized compile warnings
Initialize "unsigned int inner" in hash() functions
Includes a log_assert() that might help catch corrupted data structures
or future incomplete modification of DriveType definition
2024-11-07 19:49:25 -08:00
5 changed files with 31 additions and 7 deletions

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@ -155,7 +155,7 @@ ifeq ($(OS), Haiku)
CXXFLAGS += -D_DEFAULT_SOURCE CXXFLAGS += -D_DEFAULT_SOURCE
endif endif
YOSYS_VER := 0.47+121 YOSYS_VER := 0.47+135
# Note: We arrange for .gitcommit to contain the (short) commit hash in # Note: We arrange for .gitcommit to contain the (short) commit hash in
# tarballs generated with git-archive(1) using .gitattributes. The git repo # tarballs generated with git-archive(1) using .gitattributes. The git repo

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@ -56,6 +56,9 @@ if os.getenv("READTHEDOCS"):
else: else:
release = yosys_ver release = yosys_ver
todo_include_todos = False todo_include_todos = False
elif os.getenv("YOSYS_DOCS_RELEASE") is not None:
release = yosys_ver
todo_include_todos = False
else: else:
release = yosys_ver release = yosys_ver
todo_include_todos = True todo_include_todos = True
@ -87,5 +90,9 @@ def setup(app: Sphinx) -> None:
from util.RtlilLexer import RtlilLexer from util.RtlilLexer import RtlilLexer
app.add_lexer("RTLIL", RtlilLexer) app.add_lexer("RTLIL", RtlilLexer)
from furo_ys.lexers.YoscryptLexer import YoscryptLexer try:
app.add_lexer("yoscrypt", YoscryptLexer) from furo_ys.lexers.YoscryptLexer import YoscryptLexer
app.add_lexer("yoscrypt", YoscryptLexer)
except ModuleNotFoundError:
from pygments.lexers.special import TextLexer
app.add_lexer("yoscrypt", TextLexer)

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@ -364,7 +364,7 @@ public:
unsigned int hash() const unsigned int hash() const
{ {
unsigned int inner; unsigned int inner = 0;
switch (type_) switch (type_)
{ {
case DriveType::NONE: case DriveType::NONE:
@ -385,6 +385,9 @@ public:
case DriveType::MULTIPLE: case DriveType::MULTIPLE:
inner = multiple_.hash(); inner = multiple_.hash();
break; break;
default:
log_abort();
break;
} }
return mkhash((unsigned int)type_, inner); return mkhash((unsigned int)type_, inner);
} }
@ -912,7 +915,7 @@ public:
unsigned int hash() const unsigned int hash() const
{ {
unsigned int inner; unsigned int inner = 0;
switch (type_) switch (type_)
{ {
case DriveType::NONE: case DriveType::NONE:
@ -933,6 +936,9 @@ public:
case DriveType::MULTIPLE: case DriveType::MULTIPLE:
inner = multiple_.hash(); inner = multiple_.hash();
break; break;
default:
log_abort();
break;
} }
return mkhash((unsigned int)type_, inner); return mkhash((unsigned int)type_, inner);
} }

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@ -814,6 +814,7 @@ struct RTLIL::AttrObject
void set_bool_attribute(const RTLIL::IdString &id, bool value=true); void set_bool_attribute(const RTLIL::IdString &id, bool value=true);
bool get_bool_attribute(const RTLIL::IdString &id) const; bool get_bool_attribute(const RTLIL::IdString &id) const;
[[deprecated("Use Module::get_blackbox_attribute() instead.")]]
bool get_blackbox_attribute(bool ignore_wb=false) const { bool get_blackbox_attribute(bool ignore_wb=false) const {
return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox)); return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox));
} }
@ -1291,6 +1292,10 @@ public:
virtual void optimize(); virtual void optimize();
virtual void makeblackbox(); virtual void makeblackbox();
bool get_blackbox_attribute(bool ignore_wb=false) const {
return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox));
}
void connect(const RTLIL::SigSig &conn); void connect(const RTLIL::SigSig &conn);
void connect(const RTLIL::SigSpec &lhs, const RTLIL::SigSpec &rhs); void connect(const RTLIL::SigSpec &lhs, const RTLIL::SigSpec &rhs);
void new_connections(const std::vector<RTLIL::SigSig> &new_conn); void new_connections(const std::vector<RTLIL::SigSig> &new_conn);

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@ -78,7 +78,7 @@ struct SynthQuickLogicPass : public ScriptPass {
} }
string top_opt, blif_file, edif_file, family, currmodule, verilog_file, lib_path; string top_opt, blif_file, edif_file, family, currmodule, verilog_file, lib_path;
bool abc9, inferAdder, nobram, bramTypes, dsp; bool abc9, inferAdder, nobram, bramTypes, dsp, flatten;
void clear_flags() override void clear_flags() override
{ {
@ -94,6 +94,7 @@ struct SynthQuickLogicPass : public ScriptPass {
bramTypes = false; bramTypes = false;
lib_path = "+/quicklogic/"; lib_path = "+/quicklogic/";
dsp = true; dsp = true;
flatten = true;
} }
void set_scratchpad_defaults(RTLIL::Design *design) { void set_scratchpad_defaults(RTLIL::Design *design) {
@ -158,6 +159,10 @@ struct SynthQuickLogicPass : public ScriptPass {
dsp = false; dsp = false;
continue; continue;
} }
if (args[argidx] == "-noflatten") {
flatten = false;
continue;
}
break; break;
} }
extra_args(args, argidx, design); extra_args(args, argidx, design);
@ -202,7 +207,8 @@ struct SynthQuickLogicPass : public ScriptPass {
if (check_label("prepare")) { if (check_label("prepare")) {
run("proc"); run("proc");
run("flatten"); if (flatten)
run("flatten", "(unless -noflatten)");
if (help_mode || family == "pp3") { if (help_mode || family == "pp3") {
run("tribuf -logic", " (for pp3)"); run("tribuf -logic", " (for pp3)");
} }