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44b0e57a5a
Author | SHA1 | Date |
---|---|---|
N. Engelhardt | 44b0e57a5a | |
KrystalDelusion | 6f3376cbe6 | |
github-actions[bot] | 87742fa688 | |
Martin Povišer | 646c5a19a8 | |
Martin Povišer | 1717a0b9c0 | |
KrystalDelusion | f428163252 | |
Krystine Sherwin | e649c1a8e1 | |
Krystine Sherwin | 44b68fb498 | |
Krystine Sherwin | 1476eaba00 | |
N. Engelhardt | df72f30141 | |
Larry Doolittle | 3ae9ca7c2b | |
Larry Doolittle | d36a387aca |
2
Makefile
2
Makefile
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@ -155,7 +155,7 @@ ifeq ($(OS), Haiku)
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CXXFLAGS += -D_DEFAULT_SOURCE
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CXXFLAGS += -D_DEFAULT_SOURCE
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endif
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endif
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YOSYS_VER := 0.47+121
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YOSYS_VER := 0.47+135
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# Note: We arrange for .gitcommit to contain the (short) commit hash in
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# Note: We arrange for .gitcommit to contain the (short) commit hash in
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# tarballs generated with git-archive(1) using .gitattributes. The git repo
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# tarballs generated with git-archive(1) using .gitattributes. The git repo
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@ -56,6 +56,9 @@ if os.getenv("READTHEDOCS"):
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else:
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else:
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release = yosys_ver
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release = yosys_ver
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todo_include_todos = False
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todo_include_todos = False
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elif os.getenv("YOSYS_DOCS_RELEASE") is not None:
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release = yosys_ver
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todo_include_todos = False
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else:
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else:
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release = yosys_ver
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release = yosys_ver
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todo_include_todos = True
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todo_include_todos = True
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@ -87,5 +90,9 @@ def setup(app: Sphinx) -> None:
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from util.RtlilLexer import RtlilLexer
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from util.RtlilLexer import RtlilLexer
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app.add_lexer("RTLIL", RtlilLexer)
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app.add_lexer("RTLIL", RtlilLexer)
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from furo_ys.lexers.YoscryptLexer import YoscryptLexer
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try:
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app.add_lexer("yoscrypt", YoscryptLexer)
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from furo_ys.lexers.YoscryptLexer import YoscryptLexer
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app.add_lexer("yoscrypt", YoscryptLexer)
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except ModuleNotFoundError:
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from pygments.lexers.special import TextLexer
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app.add_lexer("yoscrypt", TextLexer)
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@ -364,7 +364,7 @@ public:
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unsigned int hash() const
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unsigned int hash() const
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{
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{
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unsigned int inner;
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unsigned int inner = 0;
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switch (type_)
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switch (type_)
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{
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{
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case DriveType::NONE:
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case DriveType::NONE:
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@ -385,6 +385,9 @@ public:
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case DriveType::MULTIPLE:
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case DriveType::MULTIPLE:
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inner = multiple_.hash();
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inner = multiple_.hash();
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break;
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break;
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default:
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log_abort();
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break;
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}
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}
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return mkhash((unsigned int)type_, inner);
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return mkhash((unsigned int)type_, inner);
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}
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}
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@ -912,7 +915,7 @@ public:
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unsigned int hash() const
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unsigned int hash() const
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{
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{
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unsigned int inner;
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unsigned int inner = 0;
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switch (type_)
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switch (type_)
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{
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{
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case DriveType::NONE:
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case DriveType::NONE:
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@ -933,6 +936,9 @@ public:
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case DriveType::MULTIPLE:
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case DriveType::MULTIPLE:
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inner = multiple_.hash();
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inner = multiple_.hash();
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break;
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break;
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default:
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log_abort();
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break;
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}
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}
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return mkhash((unsigned int)type_, inner);
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return mkhash((unsigned int)type_, inner);
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}
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}
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@ -814,6 +814,7 @@ struct RTLIL::AttrObject
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void set_bool_attribute(const RTLIL::IdString &id, bool value=true);
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void set_bool_attribute(const RTLIL::IdString &id, bool value=true);
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bool get_bool_attribute(const RTLIL::IdString &id) const;
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bool get_bool_attribute(const RTLIL::IdString &id) const;
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[[deprecated("Use Module::get_blackbox_attribute() instead.")]]
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bool get_blackbox_attribute(bool ignore_wb=false) const {
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bool get_blackbox_attribute(bool ignore_wb=false) const {
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return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox));
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return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox));
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}
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}
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@ -1291,6 +1292,10 @@ public:
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virtual void optimize();
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virtual void optimize();
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virtual void makeblackbox();
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virtual void makeblackbox();
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bool get_blackbox_attribute(bool ignore_wb=false) const {
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return get_bool_attribute(ID::blackbox) || (!ignore_wb && get_bool_attribute(ID::whitebox));
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}
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void connect(const RTLIL::SigSig &conn);
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void connect(const RTLIL::SigSig &conn);
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void connect(const RTLIL::SigSpec &lhs, const RTLIL::SigSpec &rhs);
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void connect(const RTLIL::SigSpec &lhs, const RTLIL::SigSpec &rhs);
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void new_connections(const std::vector<RTLIL::SigSig> &new_conn);
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void new_connections(const std::vector<RTLIL::SigSig> &new_conn);
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@ -78,7 +78,7 @@ struct SynthQuickLogicPass : public ScriptPass {
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}
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}
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string top_opt, blif_file, edif_file, family, currmodule, verilog_file, lib_path;
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string top_opt, blif_file, edif_file, family, currmodule, verilog_file, lib_path;
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bool abc9, inferAdder, nobram, bramTypes, dsp;
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bool abc9, inferAdder, nobram, bramTypes, dsp, flatten;
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void clear_flags() override
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void clear_flags() override
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{
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{
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@ -94,6 +94,7 @@ struct SynthQuickLogicPass : public ScriptPass {
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bramTypes = false;
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bramTypes = false;
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lib_path = "+/quicklogic/";
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lib_path = "+/quicklogic/";
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dsp = true;
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dsp = true;
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flatten = true;
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}
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}
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void set_scratchpad_defaults(RTLIL::Design *design) {
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void set_scratchpad_defaults(RTLIL::Design *design) {
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@ -158,6 +159,10 @@ struct SynthQuickLogicPass : public ScriptPass {
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dsp = false;
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dsp = false;
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continue;
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continue;
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}
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}
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if (args[argidx] == "-noflatten") {
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flatten = false;
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continue;
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}
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break;
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break;
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}
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}
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extra_args(args, argidx, design);
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extra_args(args, argidx, design);
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@ -202,7 +207,8 @@ struct SynthQuickLogicPass : public ScriptPass {
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if (check_label("prepare")) {
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if (check_label("prepare")) {
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run("proc");
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run("proc");
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run("flatten");
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if (flatten)
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run("flatten", "(unless -noflatten)");
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if (help_mode || family == "pp3") {
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if (help_mode || family == "pp3") {
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run("tribuf -logic", " (for pp3)");
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run("tribuf -logic", " (for pp3)");
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}
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}
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