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riscv:main
riscv:krys/reduce_warnings
riscv:emil/han-carlson-adder
riscv:emil/blockrom-driver-conflict
riscv:emil/opt_expr-limit-effort
riscv:emil/make-test-faster
riscv:setenv_pass
riscv:docs-preview-noguidelines
riscv:krys/refactor_selections
riscv:krys/get_blackbox_attribute
riscv:emil/autoidx-option
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riscv:krys/blackboxes
riscv:emil/yosys-config-version
riscv:emil/clockgate-liberty
riscv:emil/opt_merge-hashing
riscv:hierarchy_notify_top_attr
riscv:dlfcn-submodule
riscv:emil/fix-filterlib-roundtrip
riscv:ql_noflatten_option
riscv:emil/path-sep-refactor
riscv:docs-preview-cmdref_groups
riscv:emil/idstring-in-fold
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riscv:emil/readme-mac-lto
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riscv:docs-preview-cellhelp
riscv:lofty/ql-oopsie
riscv:emil/log-deprecated-temp
riscv:emil/document-perffile
riscv:micko/ci_functional
riscv:emil/prove-hash-sensitivity
riscv:emil/fix-fsmdata-insertion
riscv:emil/proc_dff-rule-order
riscv:aiju/docs_gvpack_fix
riscv:emil/nix-cross-compile
riscv:krys/quotes
riscv:emil/src-attribute-std-string
riscv:emil/proc_rom-src-test
riscv:emil/main-nohash
riscv:emil/sigspec-union-nohash
riscv:emil/swap-disposable
riscv:claire/vay
riscv:krys/abc-safe
riscv:emil/bitpattern-comments
riscv:emil/sigspec-union
riscv:emil/sigspec-hell
riscv:emil/cell-playground-3
riscv:lofty/remove-sorts
riscv:emil/special-src-attribute
riscv:emil/tag-dict-inherit
riscv:emil/small-astnode
riscv:emil/nix-brokey
riscv:emil/cell-playground
riscv:krys/fix-4427
riscv:emil/tracy
riscv:emil/bufnorm-notes
riscv:update_flake_lock_action
riscv:ywb_asserts
riscv:emil/nix
riscv:lofty/intel_alm-memory_libmap
riscv:mmicko/orig_params
riscv:krys/ql-tests
riscv:ecp5_2_lattice
riscv:lofty/abc9-by-default
riscv:efb
riscv:nexus_2_lattice
riscv:claire/toposort
riscv:mmicko/verific
riscv:aki/clang_tidy
riscv:aki/wire_limit
riscv:jix/witness_flow
riscv:lofty/abc9-output-conflict
riscv:claire/ipc
riscv:claire/fix2728
riscv:sanitizers
riscv:verific-improvements
riscv:eddie/clean_unused_init
riscv:eddie/sta
riscv:eddie/ecp5_init
riscv:eddie/fix1649
riscv:0.47
riscv:0.46
riscv:0.45
riscv:docs-previewtest
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riscv:resources
riscv:yosys-0.43
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riscv:yosys-0.35
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riscv:yosys-0.2.0

10 Commits
4966c32a27 ... 50bb918a19

Author SHA1 Message Date
KrystalDelusion 50bb918a19
Merge d1eb2e518d into 6f3376cbe6 2024-11-29 05:00:27 +13:00
KrystalDelusion 6f3376cbe6
Merge pull request #4730 from YosysHQ/krys/downstream-docs 
Improvements for downstream-distro maintainability.
 2024-11-28 14:35:16 +13:00
github-actions[bot] 87742fa688 Bump version 2024-11-28 01:26:26 +00:00
Krystine Sherwin e649c1a8e1
Docs: Accept empty string for release envvar 2024-11-20 12:31:12 +13:00
Krystine Sherwin 44b68fb498
Docs: Add check for envvar to disable todos 2024-11-20 12:18:17 +13:00
Krystine Sherwin 1476eaba00
Docs: Add fallback for missing furo_ys 
This is mainly intended for (latex)pdf builds which do not use the furo-ys html theme, where the yosys script syntax highlighting can safely fallback to plaintext.  This effectively makes `furo-ys` an optional dependency to simplify distro-package maintainability.
See also #4725.
 2024-11-12 16:23:12 +13:00
KrystalDelusion d1eb2e518d Merge branch 'upstream' 2022-06-21 10:26:22 +12:00
KrystalDelusion 756a890206
Merge branch 'YosysHQ:master' into master 2022-06-14 09:54:50 +12:00
KrystalDelusion 5f1aa4ff8a Using no_rw_check to achieve parity 2022-06-03 14:10:18 +12:00
KrystalDelusion c21079e046 Regression testing for read-over-write emulation 2022-06-02 12:23:21 +12:00
6 changed files with 18 additions and 3 deletions
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2
Makefile
View File

@ -155,7 +155,7 @@ ifeq ($(OS), Haiku)
CXXFLAGS += -D_DEFAULT_SOURCE
endif
YOSYS_VER := 0.47+121
YOSYS_VER := 0.47+135
# Note: We arrange for .gitcommit to contain the (short) commit hash in
# tarballs generated with git-archive(1) using .gitattributes. The git repo

11
docs/source/conf.py
View File

@ -56,6 +56,9 @@ if os.getenv("READTHEDOCS"):
else:
release = yosys_ver
todo_include_todos = False
elif os.getenv("YOSYS_DOCS_RELEASE") is not None:
release = yosys_ver
todo_include_todos = False
else:
release = yosys_ver
todo_include_todos = True
@ -87,5 +90,9 @@ def setup(app: Sphinx) -> None:
from util.RtlilLexer import RtlilLexer
app.add_lexer("RTLIL", RtlilLexer)
from furo_ys.lexers.YoscryptLexer import YoscryptLexer
app.add_lexer("yoscrypt", YoscryptLexer)
try:
from furo_ys.lexers.YoscryptLexer import YoscryptLexer
app.add_lexer("yoscrypt", YoscryptLexer)
except ModuleNotFoundError:
from pygments.lexers.special import TextLexer
app.add_lexer("yoscrypt", TextLexer)

2
tests/arch/common/blockram.v
View File

@ -32,6 +32,8 @@ module sync_ram_sdp #(parameter DATA_WIDTH=8, ADDRESS_WIDTH=10)
localparam DEPTH = (2**ADDRESS_WIDTH-1);
reg [WORD:0] data_out_r;
(* no_rw_check *)
reg [WORD:0] memory [0:DEPTH];
always @(posedge clk) begin

1
tests/arch/ecp5/memories.ys
View File

@ -6,6 +6,7 @@ chparam -set ADDRESS_WIDTH 9 -set DATA_WIDTH 36 sync_ram_sdp
hierarchy -top sync_ram_sdp
synth_ecp5 -top sync_ram_sdp; cd sync_ram_sdp
select -assert-count 1 t:DP16KD
select -assert-none t:LUT4
## With parameters

3
tests/arch/gatemate/memory.ys
View File

@ -5,6 +5,9 @@ synth_gatemate -top sync_ram_sdp -noiopad
cd sync_ram_sdp
select -assert-count 1 t:CC_BUFG
select -assert-count 1 t:CC_BRAM_20K
select -assert-none t:CC_LUT3
select -assert-none t:CC_LUT4
select -assert-none t:CC_DFF
# 512 x 20 bit x 2 -> CC_BRAM_20K TDP RAM
design -reset

2
tests/arch/ice40/memories.ys
View File

@ -6,6 +6,8 @@ chparam -set ADDRESS_WIDTH 11 -set DATA_WIDTH 2 sync_ram_sdp
hierarchy -top sync_ram_sdp
synth_ice40 -top sync_ram_sdp; cd sync_ram_sdp
select -assert-count 1 t:SB_RAM40_4K
select -assert-none t:SB_LUT4
select -assert-none t:SB_DFF
design -reset; read_verilog -defer ../common/blockram.v
chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 4 sync_ram_sdp