Merge 9cd4b4e72d into 29e8812bab

verific: fix blackbox regression and add test case

frontends/verific/verific.cc

@@ -2126,12 +2126,6 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
 				log("    assert condition %s.\n", log_signal(cond));
 
 			Cell *cell = module->addAssert(new_verific_id(inst), cond, State::S1);
-			// Initialize FF feeding condition  to 1, in case it is not
-			// used by rest of design logic, to prevent failing on
-			// initial uninitialized state
-			if (cond.is_wire() && !cond.wire->name.isPublic())
-				cond.wire->attributes[ID::init] = Const(1,1);
-
 			import_attributes(cell->attributes, inst);
 			continue;
 		}
@@ -3428,6 +3422,7 @@ struct VerificPass : public Pass {
 			RuntimeFlags::SetVar("veri_preserve_assignments", 1);
 			RuntimeFlags::SetVar("veri_preserve_comments", 1);
 			RuntimeFlags::SetVar("veri_preserve_drivers", 1);
+			RuntimeFlags::SetVar("veri_create_empty_box", 1);
 
 			// Workaround for VIPER #13851
 			RuntimeFlags::SetVar("veri_create_name_for_unnamed_gen_block", 1);

kernel/register.cc

@@ -151,6 +151,22 @@ Pass::~Pass()
 
 Pass::pre_post_exec_state_t Pass::pre_execute()
 {
+	if (!abstract_modules_ok) {
+		bool has_top = false;
+		bool has_abstract = false;
+		for (auto mod : yosys_design->modules()) {
+			if (mod->get_bool_attribute(ID::top))
+				has_top = true;
+			if (mod->name.begins_with("$abstract"))
+				has_abstract = true;
+		}
+		if (has_abstract) {
+			std::string command = has_top ? "hierarchy" : "hierarchy -auto-top";
+			log_warning("Pass `%s` does not accept abstract modules; running `%s` first!\n", pass_name.c_str(), command.c_str());
+			run_pass(command);
+		}
+	}
+
 	pre_post_exec_state_t state;
 	call_counter++;
 	state.begin_ns = PerformanceTimer::query();
@@ -443,6 +459,7 @@ Frontend::Frontend(std::string name, std::string short_help) :
 		Pass(name.rfind("=", 0) == 0 ? name.substr(1) : "read_" + name, short_help),
 		frontend_name(name.rfind("=", 0) == 0 ? name.substr(1) : name)
 {
+	abstract_modules_ok = true;
 }
 
 void Frontend::run_register()

kernel/register.h

@@ -38,6 +38,7 @@ struct Pass
 	int call_counter;
 	int64_t runtime_ns;
 	bool experimental_flag = false;
+	bool abstract_modules_ok = false;
 
 	void experimental() {
 		experimental_flag = true;
@@ -80,7 +81,11 @@ struct ScriptPass : Pass
 	RTLIL::Design *active_design;
 	std::string active_run_from, active_run_to;
 
-	ScriptPass(std::string name, std::string short_help = "** document me **") : Pass(name, short_help) { }
+	ScriptPass(std::string name, std::string short_help = "** document me **") : Pass(name, short_help) {
+		// Either the script pass will include an explicit `hierarchy` invocation or one of the passes called inside will
+		// trigger the check for abstract modules.
+		abstract_modules_ok = true;
+	}
 
 	virtual void script() = 0;
 

passes/cmds/blackbox.cc

@@ -23,7 +23,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct BlackboxPass : public Pass {
-	BlackboxPass() : Pass("blackbox", "convert modules into blackbox modules") { }
+	BlackboxPass() : Pass("blackbox", "convert modules into blackbox modules") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/design.cc

@@ -27,7 +27,7 @@ std::map<std::string, RTLIL::Design*> saved_designs;
 std::vector<RTLIL::Design*> pushed_designs;
 
 struct DesignPass : public Pass {
-	DesignPass() : Pass("design", "save, restore and reset current design") { }
+	DesignPass() : Pass("design", "save, restore and reset current design") { abstract_modules_ok = true; }
 	~DesignPass() override {
 		for (auto &it : saved_designs)
 			delete it.second;

passes/cmds/exec.cc

@@ -37,7 +37,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct ExecPass : public Pass {
-	ExecPass() : Pass("exec", "execute commands in the operating system shell") { }
+	ExecPass() : Pass("exec", "execute commands in the operating system shell") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/logcmd.cc

@@ -26,7 +26,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct LogPass : public Pass {
-	LogPass() : Pass("log", "print text and log files") { }
+	LogPass() : Pass("log", "print text and log files") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/logger.cc

@@ -24,7 +24,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct LoggerPass : public Pass {
-	LoggerPass() : Pass("logger", "set logger properties") { }
+	LoggerPass() : Pass("logger", "set logger properties") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/plugin.cc

@@ -121,7 +121,7 @@ void load_plugin(std::string, std::vector<std::string>)
 #endif
 
 struct PluginPass : public Pass {
-	PluginPass() : Pass("plugin", "load and list loaded plugins") { }
+	PluginPass() : Pass("plugin", "load and list loaded plugins") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/scratchpad.cc

@@ -26,7 +26,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct ScratchpadPass : public Pass {
-	ScratchpadPass() : Pass("scratchpad", "get/set values in the scratchpad") { }
+	ScratchpadPass() : Pass("scratchpad", "get/set values in the scratchpad") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/setattr.cc

@@ -127,7 +127,7 @@ struct SetattrPass : public Pass {
 } SetattrPass;
 
 struct WbflipPass : public Pass {
-	WbflipPass() : Pass("wbflip", "flip the whitebox attribute") { }
+	WbflipPass() : Pass("wbflip", "flip the whitebox attribute") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
@@ -166,7 +166,7 @@ struct WbflipPass : public Pass {
 } WbflipPass;
 
 struct SetparamPass : public Pass {
-	SetparamPass() : Pass("setparam", "set/unset parameters on objects") { }
+	SetparamPass() : Pass("setparam", "set/unset parameters on objects") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
@@ -218,7 +218,7 @@ struct SetparamPass : public Pass {
 } SetparamPass;
 
 struct ChparamPass : public Pass {
-	ChparamPass() : Pass("chparam", "re-evaluate modules with new parameters") { }
+	ChparamPass() : Pass("chparam", "re-evaluate modules with new parameters") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/tee.cc

@@ -26,7 +26,7 @@ USING_YOSYS_NAMESPACE
 PRIVATE_NAMESPACE_BEGIN
 
 struct TeePass : public Pass {
-	TeePass() : Pass("tee", "redirect command output to file") { }
+	TeePass() : Pass("tee", "redirect command output to file") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/cmds/trace.cc

@@ -59,7 +59,7 @@ struct TraceMonitor : public RTLIL::Monitor
 };
 
 struct TracePass : public Pass {
-	TracePass() : Pass("trace", "redirect command output to file") { }
+	TracePass() : Pass("trace", "redirect command output to file") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

passes/hierarchy/hierarchy.cc

@@ -727,7 +727,7 @@ RTLIL::Wire *find_implicit_port_wire(Module *module, Cell *cell, const std::stri
 }
 
 struct HierarchyPass : public Pass {
-	HierarchyPass() : Pass("hierarchy", "check, expand and clean up design hierarchy") { }
+	HierarchyPass() : Pass("hierarchy", "check, expand and clean up design hierarchy") { abstract_modules_ok = true; }
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|

tests/verific/blackbox.ys

@@ -0,0 +1,24 @@
+verific -sv -lib <<EOF
+module TEST_CELL(input clk, input a, input b, output reg c);
+parameter PATH = "DEFAULT";
+always @(posedge clk) begin
+    if (PATH=="DEFAULT")
+		c <= a;
+	else 
+		c <= b;
+end
+
+endmodule
+EOF
+
+verific -sv <<EOF
+module top(input clk, input a, input b, output c, output d);
+	TEST_CELL  #(.PATH("TEST")) test1(.clk(clk),.a(a),.b(1'b1),.c(c));
+	TEST_CELL  #(.PATH("DEFAULT")) test2(.clk(clk),.a(a),.b(1'bx),.c(d));
+endmodule
+EOF
+
+verific -import top
+hierarchy -top top
+stat
+select -assert-count 2 t:TEST_CELL