This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
14,389
Commits
81
Branches
48
Tags
63
MiB
ec66122ad1
Commit Graph
1 Commits
Author
SHA1
Message
Date
Eddie Hung
5bba9c3640
ast:
fixes
#1710
; do not generate RTLIL for unreachable ternary
2020-02-27 16:55:55 -08:00