7 Commits

Author	SHA1	Message	Date
tux3	88f5977093	SystemVerilog support for implicit named port connections ... This is the `foo foo(.port1, .port2);` SystemVerilog syntax introduced in IEEE1800-2005.	2019-06-06 18:07:49 +02:00
Eric Smith	f4240cc8a4	Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.	2016-09-22 11:49:29 -06:00
Clifford Wolf	7d98645fe8	Added "make -j{N}" support to "make test"	2014-07-30 19:23:26 +02:00
Clifford Wolf	964a67ac41	Added note to "make test": use git checkout of iverilog	2014-07-16 10:03:07 +02:00
Clifford Wolf	a4ec19c25c	Added tests/realmath to "make test"	2014-06-15 09:31:03 +02:00
Johann Glaser	3cfbc18601	added ckeck for Icarus Verilog, otherwise the tests are silently stopped ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2013-03-17 09:05:15 +01:00
Clifford Wolf	7764d0ba1d	initial import	2013-01-05 11:13:26 +01:00