Clifford Wolf
ba407da187
Added addBufGate module method
2016-02-02 11:26:07 +01:00
Rick Altherr
3c48de8e21
rtlil: Improve performance of SigSpec::extract(SigSpec, SigSpec*)
...
Converting to a pool<SigBit> is fairly expensive due to inserts somewhat
frequently causing rehashing. Instead, walk through the pattern SigSpec
directly on a chunk-by-chunk basis and apply it to this SigSpec's
individual bits. Using chunks for the pattern minimizes the number of
iterations in the outer loop.
2016-01-31 09:20:16 -08:00
Rick Altherr
0265d7b100
rtlil: speed up SigSpec::sort_and_unify()
...
std::set<> internally is often a red-black tree which is fairly
expensive to create but fast to lookup. In the case of
sort_and_unify(), a set<> is constructed as a temporary object to
attempt to speed up lookups. Being a temporarily, however, the cost of
creation far outweights the lookup improvement and is a net performance
loss. Instead, sort the vector<> that already exists and then apply
std::unique().
2016-01-31 09:20:16 -08:00
Rick Altherr
89dc40f162
rtlil: improve performance of SigSpec::replace(SigSpec, SigSpec, SigSpec*)
2016-01-31 09:20:16 -08:00
Rick Altherr
cd3e1095b0
rtlil: improve performance of SigSpec::remove2(SigSpec, SigSpec*)
2016-01-31 09:20:16 -08:00
Rick Altherr
43756559d8
rtlil: rewrite remove2() to avoid copying
2016-01-30 00:28:07 -08:00
Rick Altherr
12ebdef17c
rtlil: duplicate remove2() for std::set<>
2016-01-29 23:06:40 -08:00
Clifford Wolf
207736b4ee
Import more std:: stuff into Yosys namespace
2015-10-25 19:30:49 +01:00
Clifford Wolf
7f110e7018
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()
2015-10-24 22:56:40 +02:00
Clifford Wolf
a1c3df7fe4
Fixed driver conflict handling (various cmds)
2015-10-24 19:23:30 +02:00
Clifford Wolf
2a0f577f83
Fixed handling of driver-driver conflicts in wreduce
2015-10-24 13:44:35 +02:00
Clifford Wolf
924d9d6e86
Added read-enable to memory model
2015-09-25 12:23:11 +02:00
Clifford Wolf
d212d4d0c1
Cosmetic fix in Module::addLut()
2015-09-18 21:55:12 +02:00
Clifford Wolf
ff50bc2ac3
Added $tribuf and $_TBUF_ cell types
2015-08-16 12:54:52 +02:00
Clifford Wolf
45ee2ba3b8
Fixed handling of [a-fxz?] in decimal constants
2015-08-11 11:32:37 +02:00
Clifford Wolf
8d6d5c30d9
Added WORDS parameter to $meminit
2015-07-31 10:40:09 +02:00
Clifford Wolf
6c84341f22
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
Clifford Wolf
caa274ada6
Added design->rename(module, new_name)
2015-06-30 01:37:59 +02:00
Clifford Wolf
99100f367d
Added "rename -top new_name"
2015-06-17 09:38:56 +02:00
Clifford Wolf
4c733301e6
Fixed cstr_buf for std::string with small string optimization
2015-06-11 13:39:49 +02:00
Clifford Wolf
de4f4dad3c
Fixed "avail_parameters" handling in module clone/copy
2015-06-08 14:49:34 +02:00
Clifford Wolf
f483dce7c2
Added $eq/$neq -> $logic_not/$reduce_bool optimization
2015-04-29 07:28:15 +02:00
Clifford Wolf
49859393bb
Improved attributes API and handling of "src" attributes
2015-04-24 22:04:05 +02:00
Clifford Wolf
a1c62b79d5
Avoid parameter values with size 0 ($mem cells)
2015-04-05 18:04:19 +02:00
Clifford Wolf
706631225e
Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
2015-04-05 09:45:14 +02:00
Clifford Wolf
b005eedf36
Added $assume cell type
2015-02-26 18:04:10 +01:00
Clifford Wolf
dcf2e24240
Added $meminit support to "memory" command
2015-02-14 12:55:03 +01:00
Clifford Wolf
910556560f
Added $meminit cell type
2015-02-14 10:23:03 +01:00
Clifford Wolf
05d4223fb6
Added SigSpec::has_const()
2015-02-08 00:01:51 +01:00
Clifford Wolf
dce1fae777
Added cell->known(), cell->input(portname), cell->output(portname)
2015-02-07 11:40:19 +01:00
Clifford Wolf
5b41470e15
Skip blackbox modules in design->selected_modules()
2015-02-03 23:12:23 +01:00
Clifford Wolf
f80f5b721d
Added "equiv_make -blacklist <file> -encfile <file>"
2015-01-31 12:08:20 +01:00
Clifford Wolf
43951099cf
Added dict/pool.sort()
2015-01-24 00:13:27 +01:00
Clifford Wolf
abf8398216
Progress in equiv_simple
2015-01-21 23:59:58 +00:00
Clifford Wolf
76c5d863c5
Added equiv_make command
2015-01-19 13:59:08 +01:00
Clifford Wolf
e13a45ae61
Added $equiv cell type
2015-01-19 11:55:05 +01:00
Clifford Wolf
b32ba6f568
Optimizing no-op cell->setPort()
2015-01-17 12:04:40 +01:00
Clifford Wolf
e62d838bd4
Removed SigSpec::extend_xx() api
2015-01-01 11:41:52 +01:00
Clifford Wolf
0675098733
added hashlib::mkhash_init
2014-12-30 18:51:24 +01:00
Clifford Wolf
ecd64182c5
Added "yosys -X"
2014-12-29 13:33:33 +01:00
Clifford Wolf
a2226e5307
Added mkhash_xorshift()
2014-12-29 00:12:36 +01:00
Clifford Wolf
8773fd5897
Added memhasher (yosys -M)
2014-12-28 21:27:51 +01:00
Clifford Wolf
f3a97b75c7
Fixed performance bug in object hashing
2014-12-28 19:03:18 +01:00
Clifford Wolf
3da46d3437
Renamed hashmap.h to hashlib.h, some related improvements
2014-12-28 17:51:16 +01:00
Clifford Wolf
6c8b0a5fd1
More dict/pool related changes
2014-12-27 12:02:57 +01:00
Clifford Wolf
66ab88d7b0
More hashtable finetuning
2014-12-27 03:04:50 +01:00
Clifford Wolf
ec4751e55c
Replaced std::unordered_set (nodict) with Yosys::pool
2014-12-26 21:59:41 +01:00
Clifford Wolf
9e6fb0b02c
Replaced std::unordered_map as implementation for Yosys::dict
2014-12-26 21:35:22 +01:00
Clifford Wolf
e52d1f9b9a
Added new_dict (hashmap.h) and re-enabled code coverage counters
2014-12-26 19:28:52 +01:00
Clifford Wolf
a6c96b986b
Added Yosys::{dict,nodict,vector} container types
2014-12-26 10:53:21 +01:00