Clifford Wolf
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68c99bf734
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Fixed log messages in memory_dff
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2014-06-01 11:32:27 +02:00 |
Clifford Wolf
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d5497f770b
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Updated ABC to rev fa4404b395f0
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2014-05-29 11:03:15 +02:00 |
Clifford Wolf
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61883b30f3
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Merge pull request #36 from hansiglaser/master
Various changes merged
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2014-05-29 10:26:55 +02:00 |
Johann Glaser
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278085fa01
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added log_header to miter and expose pass, show cell type for exposed ports
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2014-05-28 18:05:38 +02:00 |
Johann Glaser
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63dfbb18cf
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new flags -ignore_miss_func and -ignore_miss_dir for read_liberty
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2014-05-28 16:50:13 +02:00 |
Johann Glaser
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684c85902d
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be more verbose when techmap yielded processes
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2014-05-26 17:13:41 +02:00 |
Clifford Wolf
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68c059565a
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Fixed bug in opt_reduce (see vloghammer issue_044)
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2014-05-12 12:45:47 +02:00 |
Clifford Wolf
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f69b5800c9
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fixed syntax error in dot file created by "show" command
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2014-05-10 16:22:56 +02:00 |
Clifford Wolf
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973959c7ea
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Merge branch 'master' of github.com:cliffordwolf/yosys
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2014-05-09 18:24:13 +02:00 |
Clifford Wolf
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bfd62268cc
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Updated ABC to 67c84cdd49e4
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2014-05-09 18:23:21 +02:00 |
Clifford Wolf
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51a615b26d
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Progress in presentation
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2014-05-06 14:42:04 +02:00 |
Clifford Wolf
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30774ec6bc
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Improved ezsat stand-alone tests
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2014-05-06 13:48:25 +02:00 |
Clifford Wolf
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a5a519a9d1
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workaround for OpenBSD 'stdout' implementation
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2014-05-03 12:55:56 +02:00 |
Clifford Wolf
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75a5d6bd1e
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workaround for OpenBSD 'stdin' implementation
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2014-05-02 13:22:26 +02:00 |
Clifford Wolf
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f7e9056a93
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Merge pull request #35 from bentley/dox
Typos and grammar fixes through chapter 4.
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2014-05-02 13:18:43 +02:00 |
Anthony J. Bentley
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154c9f8b51
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Typos and grammar fixes through chapter 4.
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2014-05-02 03:08:40 -06:00 |
Clifford Wolf
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7188542155
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Fixed clang -Wdeprecated-register warnings
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2014-04-20 14:28:23 +02:00 |
Clifford Wolf
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a1be4816d6
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Replaced depricated %name-prefix= bison directive
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2014-04-20 14:22:11 +02:00 |
Clifford Wolf
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d2d48996c4
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minisat compile fix
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2014-04-20 14:17:40 +02:00 |
Clifford Wolf
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12a3c05229
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Updated README
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2014-04-18 10:19:46 +02:00 |
Clifford Wolf
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d18c10d991
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Merge pull request #33 from bentley/dox
Typos and grammar fixes through chapter 2.
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2014-04-11 13:06:02 +02:00 |
Anthony J. Bentley
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9c1e578afe
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Typos and grammar fixes through chapter 2.
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2014-04-11 02:42:59 -06:00 |
Clifford Wolf
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6ef2224331
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Merge pull request #31 from bentley/posix-rm
Remove non-POSIX 'rm -v'.
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2014-04-05 02:56:28 +02:00 |
Anthony J. Bentley
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66a5da5edc
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POSIX find requires a path argument.
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2014-04-04 16:51:27 -06:00 |
Anthony J. Bentley
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b950197da1
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Remove non-POSIX 'rm -v'.
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2014-04-04 16:39:03 -06:00 |
Clifford Wolf
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7370ae01e9
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Added SIMLIB_NOLUT to simlib.v
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2014-04-02 21:28:33 +02:00 |
Clifford Wolf
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e24797add0
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Added SIMLIB_NOSR to simlib.v
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2014-04-02 21:06:55 +02:00 |
Clifford Wolf
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d4a1b0af5b
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Added support for dlatchsr cells
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2014-03-31 14:14:40 +02:00 |
Clifford Wolf
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a3b9692a68
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Fixed mapping of Verific WIDE_DFFRS operator
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2014-03-20 13:40:01 +01:00 |
Clifford Wolf
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470c2455e4
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Fixed mapping of Verific FADD primitive with unconnected outputs
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2014-03-20 13:26:52 +01:00 |
Clifford Wolf
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9a34486bfb
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Fixed performance problem in opt_mux with nets driven by many conflicting drivers
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2014-03-19 10:05:01 +01:00 |
Clifford Wolf
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cdf1257565
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Progress in Verific bindings
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2014-03-17 14:43:16 +01:00 |
Clifford Wolf
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e164edc8d1
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Fixed typo in RTLIL::Module::addAdff()
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2014-03-17 14:41:41 +01:00 |
Clifford Wolf
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0b0dcfda7d
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Progress in Verific bindings
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2014-03-17 02:43:53 +01:00 |
Clifford Wolf
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a67cd2d4a2
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Progress in Verific bindings
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2014-03-17 01:56:00 +01:00 |
Clifford Wolf
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acda74c12c
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Added support for memories to verific bindings
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2014-03-16 17:05:05 +01:00 |
Clifford Wolf
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7545510edc
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Use Verific Net::{IsGnd,IsPwr} API in Verific bindings
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2014-03-16 16:06:03 +01:00 |
Clifford Wolf
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ef1795a1e8
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Fixed typo in RTLIL::Module::{addSshl,addSshr}
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2014-03-15 22:52:10 +01:00 |
Clifford Wolf
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0ebee4c8e7
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Progress in Verific bindings
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2014-03-15 22:51:12 +01:00 |
Clifford Wolf
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fc2c821407
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Progress in Verific bindings
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2014-03-15 15:31:54 +01:00 |
Clifford Wolf
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1d00ad9d4d
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Progress in Verific bindings
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2014-03-15 14:36:11 +01:00 |
Clifford Wolf
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b7c71d92f6
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Added RTLIL::Module::add{Dff,Dffsr,Adff,Dlatch}Gate() API
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2014-03-15 14:35:29 +01:00 |
Clifford Wolf
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e37d672ae7
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Progress in Verific bindings
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2014-03-14 16:40:25 +01:00 |
Clifford Wolf
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5da9558fa8
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Added log_dump() support for generic pointers
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2014-03-14 16:39:50 +01:00 |
Clifford Wolf
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0ac915a757
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Progress in Verific bindings
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2014-03-14 11:46:13 +01:00 |
Clifford Wolf
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77e5968323
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Added RTLIL::Module::Add{Inv,And,Or,Xor,Mux}Gate API
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2014-03-14 11:45:44 +01:00 |
Clifford Wolf
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9a1accf692
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Progress in Verific bindings
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2014-03-13 18:21:00 +01:00 |
Clifford Wolf
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6a53bc7b27
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Copy Verific vdbs files to Yosys "share" data directory
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2014-03-13 17:34:31 +01:00 |
Clifford Wolf
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34e54cda5b
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Small improvement in SAT log messages
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2014-03-13 13:12:49 +01:00 |
Clifford Wolf
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7a1ac11203
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Added test_navre.ys for verific frontend
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2014-03-13 13:12:06 +01:00 |