Clifford Wolf
|
6a382f2aba
|
Fixed handling of unconditional generate blocks
|
2013-03-26 09:44:54 +01:00 |
Clifford Wolf
|
227520f94d
|
Added nosync attribute and some async reset related fixes
|
2013-03-25 17:13:14 +01:00 |
Clifford Wolf
|
df9753d398
|
Added mem2reg option to verilog frontend
|
2013-03-24 11:13:32 +01:00 |
Clifford Wolf
|
3a5244e913
|
Another fix in mem2reg ast simplify logic
|
2013-03-24 10:42:08 +01:00 |
Clifford Wolf
|
bb3357c027
|
Improved mem2reg handling in ast simplifier
|
2013-03-24 09:27:01 +01:00 |
Clifford Wolf
|
e45d1c8865
|
Tiny fixes to verilog parser
|
2013-03-23 18:54:31 +01:00 |
Clifford Wolf
|
a321a5c412
|
Moved stand-alone libs to libs/ directory and added libs/subcircuit
|
2013-02-27 09:32:19 +01:00 |
Clifford Wolf
|
4f0c2862a0
|
Added support for verilog genblock[index].member syntax
|
2013-02-26 13:18:22 +01:00 |
Clifford Wolf
|
7764d0ba1d
|
initial import
|
2013-01-05 11:13:26 +01:00 |