riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
10,894 Commits 81 Branches 48 Tags 63 MiB
Commit Graph

1 Commits

Author SHA1 Message Date
Marcin Kościelnicki e91368a5f4 fsm_extract: Initialize celltypes with full design. 
Fixes #1781.
 2020-03-19 18:51:21 +01:00