Clifford Wolf
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49f72421d5
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Using new obj iterator API in a few places
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2014-07-27 11:32:42 +02:00 |
Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
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6aa792c864
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Replaced more old SigChunk programming patterns
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2014-07-24 23:10:58 +02:00 |
Clifford Wolf
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c094c53de8
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Removed RTLIL::SigSpec::optimize()
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2014-07-23 20:32:28 +02:00 |
Clifford Wolf
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4b4048bc5f
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SigSpec refactoring: using the accessor functions everywhere
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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a233762a81
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SigSpec refactoring: renamed chunks and width to __chunks and __width
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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361e0d62ff
|
Replaced depricated NEW_WIRE macro with module->addWire() calls
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2014-07-21 12:42:02 +02:00 |
Clifford Wolf
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1c85584fe5
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Do not create $dffsr cells with no-op resets in proc_dff
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2014-06-19 12:29:29 +02:00 |
Clifford Wolf
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628b994cf6
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Added support for complex set-reset flip-flops in proc_dff
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2013-10-24 16:54:05 +02:00 |
Clifford Wolf
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d61699843f
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Improved handling of dff with async resets
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2013-10-21 14:51:58 +02:00 |
Clifford Wolf
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bfa1a65fa9
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Added dffsr support to proc_dff pass
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2013-10-18 13:26:52 +02:00 |
Johann Glaser
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cd8008bda0
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fixed typos
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2013-03-18 07:28:31 +01:00 |
Clifford Wolf
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f952309c81
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Added help messages to proc_* passes
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2013-03-01 09:26:29 +01:00 |
Clifford Wolf
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7764d0ba1d
|
initial import
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2013-01-05 11:13:26 +01:00 |