Eddie Hung
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585e6ddc6c
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Let's not go crazy: use nonzero costs
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2019-06-26 14:16:44 -07:00 |
Eddie Hung
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b2b5cf78e2
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Rework muxcover decoder gen if more significant muxes are 1'bx
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2019-06-26 13:50:19 -07:00 |
Eddie Hung
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6d9ba40263
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Add tests
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2019-06-26 13:49:51 -07:00 |
Eddie Hung
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c762be5930
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Instead of blocking wreduce on $mux, use -keepdc instead #1132
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2019-06-26 11:48:35 -07:00 |
Eddie Hung
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8d8261c71f
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Do not call opt with -full before muxcover
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2019-06-26 11:38:28 -07:00 |
Eddie Hung
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80de03a7a6
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-26 11:24:39 -07:00 |
Eddie Hung
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4d0014d1b1
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Cleanup abc_box_id
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2019-06-26 11:23:57 -07:00 |
Eddie Hung
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5fa2afc58c
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Merge branch 'koriakin/xc7nocarrymux' into xaig
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2019-06-26 10:47:53 -07:00 |
Eddie Hung
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6db181471e
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Grrr
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2019-06-26 10:47:03 -07:00 |
David Shah
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71b046d639
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tests: Check that Icarus can parse arch sim models
Signed-off-by: David Shah <dave@ds0.me>
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2019-06-26 18:46:22 +01:00 |
Eddie Hung
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612083a807
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-26 10:33:54 -07:00 |
Eddie Hung
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5e1b8d458b
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Remove unused var
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2019-06-26 10:33:07 -07:00 |
Eddie Hung
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988e6163ab
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Add _nowide variants of LUT libraries in -nowidelut flows
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2019-06-26 10:23:29 -07:00 |
Eddie Hung
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741ebba70a
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
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2019-06-26 10:10:16 -07:00 |
Eddie Hung
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86a5fbcde9
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Merge branch 'koriakin/xc7nocarrymux' into xaig
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2019-06-26 10:09:59 -07:00 |
Eddie Hung
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138989e1a3
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Fix spacing
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2019-06-26 10:09:18 -07:00 |
Eddie Hung
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df3a037489
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Merge branch 'koriakin/xc7nocarrymux' into xaig
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2019-06-26 10:08:40 -07:00 |
Eddie Hung
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cb722e7b58
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Oops. Actually use nocarry flag as spotted by @koriakin
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2019-06-26 10:06:33 -07:00 |
Clifford Wolf
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0d2b87e3ed
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Merge pull request #1137 from mmicko/cell_sim_fix
Simulation model verilog fix
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2019-06-26 19:06:10 +02:00 |
Eddie Hung
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799b18263f
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Merge branch 'koriakin/xc7nocarrymux' into xaig
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2019-06-26 10:04:01 -07:00 |
Miodrag Milanovic
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ea0b6258ab
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Simulation model verilog fix
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2019-06-26 18:34:34 +02:00 |
Eddie Hung
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4ce329aefd
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synth_ecp5 rename -nomux to -nowidelut, but preserve former
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2019-06-26 09:33:48 -07:00 |
Eddie Hung
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7389b043c0
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Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7nocarrymux
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2019-06-26 09:33:38 -07:00 |
Eddie Hung
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177c26ca35
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Rename -minmuxf to -widemux
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2019-06-26 09:16:45 -07:00 |
Eddie Hung
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184cfacfb5
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-26 09:15:28 -07:00 |
Clifford Wolf
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0b7d648c6a
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Improve opt_clean handling of unused public wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-26 17:54:17 +02:00 |
Eddie Hung
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4f0cb34495
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Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del
abc9: Add wire delays to synth_ice40
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2019-06-26 08:51:11 -07:00 |
Clifford Wolf
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1b49380f6b
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Improve BTOR2 handling of undriven wires
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-26 17:42:00 +02:00 |
David Shah
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0dd850e655
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abc9: Add wire delays to synth_ice40
Signed-off-by: David Shah <dave@ds0.me>
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2019-06-26 11:39:44 +01:00 |
Clifford Wolf
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f6053b8810
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Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-26 11:09:43 +02:00 |
Clifford Wolf
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8e9ef891fe
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Do not clean up buffer cells with "keep" attribute, closes #1128
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-26 11:01:03 +02:00 |
Clifford Wolf
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b3c36b4448
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Escape scope names starting with dollar sign in smtio.py
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-06-26 10:58:39 +02:00 |
whitequark
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3d4102cfa4
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Add more ECP5 Diamond flip-flops.
This includes all I/O registers, and a few more regular FFs where it
was convenient.
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2019-06-26 01:57:29 +00:00 |
Eddie Hung
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1a4092d26a
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-25 10:39:08 -07:00 |
Eddie Hung
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5db96b8aec
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Missing muxpack.o in Makefile
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2019-06-25 10:38:42 -07:00 |
Eddie Hung
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fac3528133
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-25 09:36:12 -07:00 |
Eddie Hung
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480a04cb3c
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Realistic delays for RAM32X1D too
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2019-06-25 09:34:28 -07:00 |
Eddie Hung
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6095357390
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Add RAM32X1D box info
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2019-06-25 09:34:19 -07:00 |
Eddie Hung
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6f36ec8ecf
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Merge remote-tracking branch 'origin/master' into xaig
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2019-06-25 09:33:11 -07:00 |
Eddie Hung
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4238feed81
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This optimisation doesn't seem to work...
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2019-06-25 09:21:46 -07:00 |
Eddie Hung
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ab6e8ce0f0
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Add testcase from #335, fixed by #1130
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2019-06-25 08:43:58 -07:00 |
Clifford Wolf
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add2d415fc
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Merge pull request #1130 from YosysHQ/eddie/fix710
memory_dff: walk through more than one mux for computing read enable
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2019-06-25 17:34:44 +02:00 |
Eddie Hung
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42720ef6fe
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Fix spacing
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2019-06-25 08:33:17 -07:00 |
Eddie Hung
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c4e4902098
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Move only one consumer check outside of while loop
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2019-06-25 08:29:55 -07:00 |
Eddie Hung
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58629dc2ce
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Merge pull request #1129 from YosysHQ/eddie/ram32x1d
Add RAM32X1D support
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2019-06-25 08:22:57 -07:00 |
Clifford Wolf
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e754bce047
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Merge pull request #1075 from YosysHQ/eddie/muxpack
Add new "muxpack" command for packing chains of $mux cells
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2019-06-25 17:21:59 +02:00 |
Eddie Hung
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d2fed0a7f1
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nullptr check
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2019-06-25 06:06:32 -07:00 |
Eddie Hung
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5b89553a1f
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nullptr check
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2019-06-24 23:37:01 -07:00 |
Eddie Hung
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158325956e
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Realistic delays for RAM32X1D too
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2019-06-24 23:05:28 -07:00 |
Eddie Hung
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3825068a75
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Merge remote-tracking branch 'origin/xaig' into xc7mux
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2019-06-24 23:04:25 -07:00 |