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yosys
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1,709 Commits 89 Branches 49 Tags 38 MiB
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1709 Commits

Author SHA1 Message Date
Clifford Wolf a1c7d4a8e2 Added eval model for $lut cells 2014-08-31 17:43:31 +02:00
Clifford Wolf 0b6769af3f Typo fixes in cell->*Param() API 2014-08-31 17:43:31 +02:00
Clifford Wolf 8649b57b6f Added $lut support in test_cell, techmap, satgen 2014-08-31 17:43:31 +02:00
Clifford Wolf 2a1b08aeb3 Added design->scratchpad 2014-08-30 19:37:12 +02:00
Clifford Wolf 4724d94fbc Added $alu cell type 2014-08-30 18:59:05 +02:00
Clifford Wolf 88db09255b Added autotest -e (do not use -noexpr on write_verilog) 2014-08-30 18:34:07 +02:00
Clifford Wolf 6ff46323a3 Improved write address decoder generation memory_map 2014-08-30 18:18:15 +02:00
Clifford Wolf dfbd7dd15a Fixed module->addPmux() 2014-08-30 18:17:22 +02:00
Clifford Wolf 66763fad4e Using worker class in memory_map 2014-08-30 17:39:08 +02:00
Clifford Wolf eb571cba6a Replaced $__alu CO/CS outputs with full-width CO output 2014-08-30 15:12:39 +02:00
Clifford Wolf 3a7d5d188d Don't change existing binary FSM encoding if it is already optimal 2014-08-30 14:43:06 +02:00
Clifford Wolf f910481f35 Using $pmux info in fsm_extract to optimize transition ctrl_in patterns 2014-08-30 14:34:49 +02:00
Clifford Wolf ab019b0bd5 Improved handling of $pmux cells in fsm_extract 2014-08-30 14:11:57 +02:00
Clifford Wolf d148b0af0d Fixed inserting of Q-inverters in dfflibmap 2014-08-27 19:44:12 +02:00
Clifford Wolf cfb4338319 Fixed printing of multi-line Makefile.conf 2014-08-27 12:13:53 +02:00
Clifford Wolf 084685f480 Implemented "rename -enumerate -pattern" 2014-08-26 12:51:08 +02:00
Clifford Wolf e70480655e Print Makefile.conf as make info message 2014-08-26 10:11:46 +02:00
Clifford Wolf 672b2c6db1 Checking for valid CONFIG value in Makefile 2014-08-25 12:48:20 +02:00
Clifford Wolf 7bbbe3580d Optimize shift ops with constant rhs in opt_const 2014-08-24 17:08:43 +02:00
Clifford Wolf 641501203c Added some additional log messages to opt_const 2014-08-24 17:08:43 +02:00
Clifford Wolf eda603105e Added is_signed argument to SigSpec.as_int() and Const.as_int() 2014-08-24 15:14:00 +02:00
Clifford Wolf 9c5a63c52c azonenberg: Make dump_vcd save model when temporal induction fails due to step limit 2014-08-24 13:27:40 +02:00
Clifford Wolf c642dd0b3e Only call proc_share_dirname() in techmap when necessary 2014-08-23 15:32:00 +02:00
Clifford Wolf 58367cd87a Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore 2014-08-23 15:14:58 +02:00
Clifford Wolf 19cff41eb4 Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
Clifford Wolf 5dce303a2a Changed backend-api from FILE to std::ostream 2014-08-23 13:54:21 +02:00
Clifford Wolf fff12c719f Added "stat -width" 2014-08-22 17:20:28 +02:00
Clifford Wolf 98442e019d Added emscripten (emcc) support to build system and some build fixes 2014-08-22 16:20:22 +02:00
Clifford Wolf ba83a7bdc6 Added DPI-C documentation to README file 2014-08-22 14:37:14 +02:00
Clifford Wolf e218f0eacf Added support for non-standard <plugin>:<c_name> DPI syntax 2014-08-22 14:30:29 +02:00
Clifford Wolf 74af3a2b70 Archibald Rust and Clifford Wolf: ffi-based dpi_call() 2014-08-22 14:22:09 +02:00
Clifford Wolf a3494fa9ed Added "plugin" command 2014-08-22 14:00:11 +02:00
Clifford Wolf 752650a062 Updated ABC to 4d547a5e065b 2014-08-22 12:20:23 +02:00
Clifford Wolf c2df5b9175 Cosmetic changes to FSM tests 2014-08-21 17:40:49 +02:00
Clifford Wolf ad146c2582 Fixed small memory leak in ast simplify 2014-08-21 17:33:40 +02:00
Clifford Wolf 6c5cafcd8b Added support for DPI function with different names in C and Verilog 2014-08-21 17:22:04 +02:00
Clifford Wolf 085c8e873d Added AstNode::asInt() 2014-08-21 17:11:51 +02:00
Clifford Wolf 490d7a5bf2 Fixed memory leak in DPI function calls 2014-08-21 13:09:47 +02:00
Clifford Wolf 4f35a81ad9 Merge branch 'master' of github.com:cliffordwolf/yosys 2014-08-21 12:58:16 +02:00
Clifford Wolf 7bfc4ae120 Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) 2014-08-21 12:43:51 +02:00
Clifford Wolf 38addd4c67 Added support for global tasks and functions 2014-08-21 12:42:28 +02:00
Clifford Wolf b37d70dfd7 Added mod->addGate() methods for new gate types 2014-08-19 14:26:54 +02:00
Clifford Wolf a92a68ce52 Using "via_celltype" in $mul carry-save-acc implementation 2014-08-18 14:30:20 +02:00
Clifford Wolf 640d9fc551 Added "via_celltype" attribute on task/func 2014-08-18 14:29:30 +02:00
Clifford Wolf 6f33fc3e87 Performance fix for new $__lcu techmap rule 2014-08-18 00:27:54 +02:00
Clifford Wolf 4b3834e0cc Replaced recursive lcu scheme with bk adder 2014-08-18 00:03:33 +02:00
Clifford Wolf acb435b6cf Added const folding of AST_CASE to AST simplifier 2014-08-18 00:02:30 +02:00
Clifford Wolf aa7a3ed83f Fixed proc_{self,share}_dirname error handling 2014-08-17 02:25:59 +02:00
Clifford Wolf aa3a6663e2 Makefile fixes 2014-08-17 02:24:53 +02:00
Clifford Wolf 64713647a9 Improved AST ProcessGenerator performance 2014-08-17 02:17:49 +02:00