Clifford Wolf
bab39eacce
Merge pull request #505 from thefallenidealist/FreeBSD_build
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FreeBSD build
2018-05-13 13:27:14 +02:00
Christian Krämer
c1ecb1b2f1
Add "#ifdef __FreeBSD__"
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(Re-commit e3575a8
with corrected author field)
2018-05-13 13:08:26 +02:00
Clifford Wolf
1167538d26
Revert "Add "#ifdef __FreeBSD__""
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This reverts commit e3575a86c5
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2018-05-13 13:06:36 +02:00
Sergiusz Bazanski
7d076f071e
Also interpret '&' in liberty functions
2018-05-12 20:55:31 +02:00
Clifford Wolf
587056447e
Add optimization of tristate buffer with constant control input
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-12 15:18:27 +02:00
Clifford Wolf
11406a8082
Add "hierarchy -simcheck"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-12 13:59:13 +02:00
Johnny Sorocil
5b9f73cd91
update README
2018-05-06 18:22:18 +02:00
Johnny Sorocil
0295213bec
autotest.sh: Change from /bin/bash to /usr/bin/env bash
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This enables running tests on Unix systems which are not shipped with
bash installed in /bin/bash (eg *BSDs and Solaris).
2018-05-06 15:26:23 +02:00
Johnny Sorocil
74f2787b10
Enable building on FreeBSD
2018-05-06 15:19:44 +02:00
Clifford Wolf
24e6401617
Further improve handling of zero-length SVA consecutive repetition
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-05 14:32:04 +02:00
Clifford Wolf
3e67497ec2
Fix handling of zero-length SVA consecutive repetition
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-05 13:58:01 +02:00
Johnny Sorocil
e3575a86c5
Add "#ifdef __FreeBSD__"
2018-05-05 13:02:44 +02:00
Clifford Wolf
145c685de0
Add ABC FAQ to "help abc"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-04 21:59:31 +02:00
Clifford Wolf
5c03aeac60
Add "yosys -e regex" for turning warnings into errors
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-04 15:27:28 +02:00
Clifford Wolf
47eb150eec
Merge pull request #537 from mithro/yosys-vpr
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Improving Yosys when used with VPR
2018-05-04 12:32:30 +02:00
Clifford Wolf
a572b49538
Replace -ignore_redef with -[no]overwrite
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-03 15:25:59 +02:00
Dan Gisselquist
e060375f23
Support more character literals
2018-05-03 12:35:01 +02:00
Clifford Wolf
ea3ff6f59c
Update ABC to git rev f23ea8e
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-30 19:50:34 +02:00
Clifford Wolf
b4c1d3084f
Add "synth_intel --noiopads"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-30 13:02:56 +02:00
Clifford Wolf
d9a2b43014
Add $dlatch support to write_verilog
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-22 16:03:26 +02:00
Tim 'mithro' Ansell
d6bdefd2e9
Improving vpr output support.
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* Support output BLIF for Xilinx architectures.
* Support using .names in BLIF for Xilinx architectures.
* Use the same `NO_LUT` define in both `synth_ice40` and
`synth_xilinx`.
2018-04-18 16:55:12 -07:00
Tim 'mithro' Ansell
ca39e493ba
synth_ice40: Rework the vpr blif output slightly.
2018-04-18 16:55:08 -07:00
Clifford Wolf
81a457c4a6
Add "synth_ice40 -nodffe"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-16 20:44:26 +02:00
Clifford Wolf
5ca91ca019
Add "write_blif -inames -iattr"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-15 14:07:21 +02:00
Clifford Wolf
2d7f3123f0
Add statement labels for immediate assertions
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-13 11:52:28 +02:00
Clifford Wolf
66ffc99695
Allow "property" in immediate assertions
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-12 14:28:28 +02:00
Clifford Wolf
2f0ecff71c
Improve Makefile error handling for when abc/ is a hg working copy
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-12 14:02:57 +02:00
Clifford Wolf
617c60cea6
Add PRIM_HDL_ASSERTION support to Verific importer
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-07 18:38:42 +02:00
Clifford Wolf
0ac768f9df
Fix handling of $global_clocking in Verific
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 21:23:47 +02:00
Clifford Wolf
035f778121
Add documentation for anyconst/anyseq/allconst/allseq attribute
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:37:43 +02:00
Clifford Wolf
5ea2c53604
Add read_verilog anyseq/anyconst/allseq/allconst attribute support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:35:11 +02:00
Clifford Wolf
278685b084
Add Verific anyseq/anyconst/allseq/allconst attribute support
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:19:55 +02:00
Clifford Wolf
ab8db2c168
Add "verific -autocover"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-06 14:10:57 +02:00
Clifford Wolf
f10e0e15c5
Merge pull request #530 from makaimann/set-ram-flags
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Set RAM runtime flags for Verific frontend
2018-04-06 13:50:23 +02:00
makaimann
0c404b1f63
Set RAM runtime flags for Verific frontend
2018-04-05 17:38:08 -07:00
Clifford Wolf
705c366a91
Added missing dont_use handling for SR FFs to dfflibmap
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-05 11:01:45 +02:00
Clifford Wolf
4a65b823db
Create issue_template.md
2018-04-04 19:27:33 +02:00
Clifford Wolf
4d6af2969c
Add smtio.py support for parsing SMT2 (_ bvX n) syntax for BitVec constants
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-04 18:12:27 +02:00
Clifford Wolf
25a864fc73
Fixed -stbv handling in SMT2 back-end
2018-04-04 17:28:07 +02:00
Clifford Wolf
2b00c1dbd6
Merge pull request #522 from c60k28/master
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Fixed broken Quartus backend on dffeas init value, and other updates.
2018-04-01 15:32:47 +02:00
c60k28
efed2420d6
Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device
2018-03-31 22:48:47 -06:00
Clifford Wolf
93985d91b1
Remove left-over log_ping debug commands.. oops.
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-31 14:23:57 +02:00
Clifford Wolf
7ea8833676
Merge pull request #521 from azonenberg/for_clifford
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coolrunner2: Improve optimization for TFF/counters
2018-03-31 13:31:01 +02:00
Robert Ou
14e49fb057
coolrunner2: Add an ANDTERM/XOR between chained FFs
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In some cases (e.g. the low bits of counters) the design might end up
with a flip-flop whose input is directly driven by another flip-flop.
This isn't possible in the Coolrunner-II architecture, so add a single
AND term and XOR in this case.
2018-03-31 03:54:48 -07:00
Robert Ou
cfa3753b89
coolrunner2: Split multi-bit nets
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The PAR tool doesn't expect any "dangling" nets with no drivers nor
sinks. By splitting the nets, clean removes them.
2018-03-31 02:56:11 -07:00
Robert Ou
8fe9cdf364
coolrunner2: Add extraction for TFFs
2018-03-31 02:54:26 -07:00
Clifford Wolf
dd5fab69c1
Add smtio status msgs when --progress is inactive
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-29 21:59:30 +02:00
Clifford Wolf
a48c7e5abf
Bugfix in smtio.py VCD file generator
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-29 12:45:31 +02:00
Clifford Wolf
665eec3d53
Removed $timescale from "sat" command VCD writer
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-29 12:38:41 +02:00
Clifford Wolf
0acea3548b
Set stack size to at least 128 MB (large stack needed for parsing huge expressions)
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-27 15:04:10 +02:00