Clifford Wolf
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0bc95f1e04
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Added "yosys -D" feature
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2016-04-21 23:28:37 +02:00 |
Clifford Wolf
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1d0f0d668a
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Renamed opt_const to opt_expr
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2016-03-31 08:46:56 +02:00 |
Clifford Wolf
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84bf862f7c
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Spell check (by Larry Doolittle)
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2015-08-14 10:56:05 +02:00 |
Clifford Wolf
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badc5f7eb9
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Added "miter -assert"
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2015-07-25 12:09:57 +02:00 |
Clifford Wolf
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6c84341f22
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Fixed trailing whitespaces
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2015-07-02 11:14:30 +02:00 |
Clifford Wolf
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f9a307a50b
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namespace Yosys
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2014-09-27 16:17:53 +02:00 |
Clifford Wolf
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c55eb8f8a6
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Use "-keepdc" in "miter -equiv -flatten"
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2014-08-07 16:42:35 +02:00 |
Clifford Wolf
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768eb846c4
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More bugfixes related to new RTLIL::IdString
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2014-08-02 18:14:21 +02:00 |
Clifford Wolf
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cdae8abe16
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Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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e6d33513a5
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Added module->design and cell->module, wire->module pointers
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2014-07-31 14:11:39 +02:00 |
Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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f9946232ad
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Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
Clifford Wolf
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946ddff9ce
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Changed a lot of code to the new RTLIL::Wire constructors
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2014-07-26 20:12:50 +02:00 |
Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
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ec923652e2
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
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2014-07-23 09:52:55 +02:00 |
Clifford Wolf
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a8d3a68971
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
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2014-07-23 09:49:43 +02:00 |
Clifford Wolf
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4b4048bc5f
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SigSpec refactoring: using the accessor functions everywhere
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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a233762a81
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SigSpec refactoring: renamed chunks and width to __chunks and __width
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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1d88f1cf9f
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Removed deprecated module->new_wire()
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2014-07-21 12:35:06 +02:00 |
Clifford Wolf
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4c38ec1cc8
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Added "miter -equiv -flatten"
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2014-07-20 15:33:07 +02:00 |
Johann Glaser
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278085fa01
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added log_header to miter and expose pass, show cell type for exposed ports
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2014-05-28 18:05:38 +02:00 |
Clifford Wolf
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eb8fd4a163
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Added miter -make_outcmp
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2014-02-06 02:20:55 +01:00 |
Clifford Wolf
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f4f0bd6eef
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Fixed a bug in miter command
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2014-02-01 22:53:27 +01:00 |
Clifford Wolf
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fa92722358
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Added miter command
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2014-02-01 10:35:56 +01:00 |