Eddie Hung
3e76e3a6fa
Add tests, fix for !=
2019-06-06 11:54:38 -07:00
Eddie Hung
543dd11c7e
Missing file
2019-06-06 11:03:45 -07:00
Eddie Hung
7bd1c664a6
Initial adaptation of muxpack from shregmap
2019-06-06 10:51:02 -07:00
Clifford Wolf
e4e1cd6930
Merge pull request #1071 from YosysHQ/eddie/fix_1070
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Fix typo in opt_rmdff causing register to be incorrectly removed
2019-06-06 06:50:12 +02:00
Clifford Wolf
50e2dce5e7
Merge pull request #1072 from YosysHQ/eddie/fix_1069
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Error out if no top module given before 'sim'
2019-06-06 06:49:07 +02:00
Eddie Hung
fd8ef128bf
Missing doc for -tech xilinx in shregmap
2019-06-05 14:21:44 -07:00
Eddie Hung
dd134914cc
Error out if no top module given before 'sim'
2019-06-05 14:16:24 -07:00
Eddie Hung
feb2ddb52b
Fix typo in opt_rmdff
2019-06-05 14:08:14 -07:00
Eddie Hung
935df3569b
shregmap -tech xilinx_static to handle INIT
2019-06-05 12:55:59 -07:00
Eddie Hung
72eda94a66
Continue support for ShregmapTechXilinx7Static
2019-06-05 12:33:55 -07:00
Eddie Hung
dfe9d95579
Add -tech xilinx_static
2019-06-05 11:14:14 -07:00
Eddie Hung
e1e37db860
Refactor to ShregmapTechXilinx7Static
2019-06-05 11:08:08 -07:00
Eddie Hung
45d1bdf83a
shregmap -tech xilinx_dynamic to work -params and -enpol
2019-06-05 10:21:57 -07:00
Eddie Hung
a3a80b755c
Merge pull request #1067 from YosysHQ/clifford/fix1065
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Suppress driver-driver conflict warning for unknown cell types
2019-06-05 09:59:05 -07:00
Eddie Hung
bcc0a5d136
Merge remote-tracking branch 'origin/master' into xc7mux
2019-06-05 09:56:57 -07:00
Eddie Hung
b5aff1de04
Merge remote-tracking branch 'origin/clifford/fix1065' into xc7mux
2019-06-05 09:56:51 -07:00
Clifford Wolf
b33176dafb
Major rewrite of wire selection in setundef -init
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-05 10:26:48 +02:00
Clifford Wolf
6cc60ffd67
Indent fix
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-05 09:53:06 +02:00
Clifford Wolf
00d32eb73d
Merge pull request #999 from jakobwenzel/setundefInitFix
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initialize more registers in setundef -init
2019-06-05 09:50:15 +02:00
Clifford Wolf
4190d7c094
Fix typo in fmcombine log message, fixes #1063
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-05 09:26:44 +02:00
Clifford Wolf
8a6f9977f6
Suppress driver-driver conflict warning for unknown cell types, fixes #1065
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-05 09:14:12 +02:00
Eddie Hung
94a5f4e609
Rename shregmap -tech xilinx -> xilinx_dynamic
2019-06-04 14:34:36 -07:00
Eddie Hung
f81a0ed92e
Merge remote-tracking branch 'origin/master' into xc7mux
2019-06-03 23:07:08 -07:00
Eddie Hung
295bd8d0bf
Remove dupe
2019-06-03 12:32:20 -07:00
Eddie Hung
eb08e71bd1
Merge branch 'xaig' into xc7mux
2019-05-31 13:03:03 -07:00
Eddie Hung
a379234f56
Throw out unused code inherited from abc
2019-05-31 12:50:11 -07:00
Clifford Wolf
90ec2cda42
Fix "tee" handling of log_streams
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-31 09:28:51 +02:00
Eddie Hung
4a6b9af227
Fix spelling
2019-05-30 15:50:47 -07:00
Eddie Hung
a44fe3a632
Revert "Re-enable &dc2"
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This reverts commit 8c58c728a7
.
2019-05-30 11:41:50 -07:00
Eddie Hung
0800846e73
Do not double count LUT1s
2019-05-30 11:32:14 -07:00
Eddie Hung
8c58c728a7
Re-enable &dc2
2019-05-30 00:42:41 -07:00
Eddie Hung
2560f92f29
Reduce -W to 160
2019-05-29 23:01:46 -07:00
Eddie Hung
854557814e
Erase all boxes before stitching
2019-05-29 19:17:36 -07:00
Eddie Hung
b955344ecd
Call &if with -W 250
2019-05-29 16:34:52 -07:00
Eddie Hung
ecaa7856e9
Add some debug to abc9
2019-05-29 15:21:41 -07:00
Clifford Wolf
349c47250a
Merge pull request #1049 from YosysHQ/clifford/fix1047
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Do not use shiftmul peepopt pattern when mul result is truncated
2019-05-28 19:02:26 +02:00
Eddie Hung
cdedf51c32
From master
2019-05-28 09:37:50 -07:00
Eddie Hung
914074a07c
Update from master
2019-05-28 09:35:45 -07:00
Eddie Hung
ba9513b325
Merge remote-tracking branch 'origin/master' into xc7mux
2019-05-28 09:30:53 -07:00
Eddie Hung
4a76b425cc
Misspell
2019-05-28 08:44:59 -07:00
Clifford Wolf
cb285e4b87
Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-28 17:17:56 +02:00
Clifford Wolf
ba2185ead8
Refactor hierarchy wand/wor handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-28 16:43:25 +02:00
Eddie Hung
89bd6b8504
If driver not found, use LUT2
2019-05-27 23:12:21 -07:00
Eddie Hung
4df37c77fd
Disconnect all ABC boxes too
2019-05-27 19:40:27 -07:00
Eddie Hung
75bd41eaeb
Parse without wideports
2019-05-27 12:22:05 -07:00
Eddie Hung
bf3b8d5e45
Remove mapped_mod when done
2019-05-27 12:19:21 -07:00
Eddie Hung
234156c01a
Instantiate cell type (from sym file) otherwise 'clean' warnings
2019-05-27 12:16:10 -07:00
Eddie Hung
03b289a851
Add 'cinput' and 'coutput' to symbols file for boxes
2019-05-27 11:38:52 -07:00
Stefan Biereigel
816082d5a1
Merge branch 'master' into wandwor
2019-05-27 19:07:46 +02:00
Stefan Biereigel
ed625a3102
move wand/wor resolution into hierarchy pass
2019-05-27 18:00:22 +02:00
Clifford Wolf
2a9c68e2d6
Merge pull request #1026 from YosysHQ/clifford/fix1023
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Keep zero-width wires in opt_clean if and only if they are ports
2019-05-27 13:24:19 +02:00
Eddie Hung
3981eba999
ABC9 to call &sweep
2019-05-26 11:31:35 -07:00
Eddie Hung
086b6560b4
Typo
2019-05-26 03:17:20 -07:00
Eddie Hung
823153e418
Combine ABC_COMMAND_LUT
2019-05-26 02:47:06 -07:00
Eddie Hung
32a4c10c0d
Fix "a" extension
2019-05-26 02:44:36 -07:00
Eddie Hung
d4fb6cac7c
Revert enable check
2019-05-25 12:55:57 -07:00
Eddie Hung
822d0b7789
opt_rmdff to optimise even in presence of enable signal, even removing
2019-05-24 18:30:51 -07:00
Eddie Hung
0d66103cbb
Add comments
2019-05-24 16:33:10 -07:00
Eddie Hung
357b1de6bc
Resolve @cliffordwolf review, set even if !has_init
2019-05-24 16:15:22 -07:00
Eddie Hung
6ad09bfcea
Add &fraig and &mfs back
2019-05-24 15:10:18 -07:00
Eddie Hung
68359bcd6f
Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux
2019-05-23 13:37:53 -07:00
Eddie Hung
5ac7e38d0a
Fix spacing
2019-05-23 12:58:30 -07:00
Eddie Hung
50ed34a6d0
opt_rmdff to work on $dffe and $_DFFE_*
2019-05-23 11:26:18 -07:00
Clifford Wolf
e3f9ccf56d
Keep zero-width wires in opt_clean if and only if they are ports, fixes #1023
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-22 13:57:36 +02:00
Eddie Hung
fb09c6219b
Merge remote-tracking branch 'origin/master' into xc7mux
2019-05-21 14:21:00 -07:00
Clifford Wolf
c4b8575f43
Add "wreduce -keepdc", fixes #1016
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-20 15:36:13 +02:00
Clifford Wolf
a21a84b3b4
Improvements in opt_clean
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-15 16:01:28 +02:00
Clifford Wolf
f67ec1b235
Do not leak file descriptors in cover.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-15 13:51:02 +02:00
Henner Zeller
5e443a5d0d
Fix two instances of integer-assignment to string.
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o In cover.cc, the int-result of mkstemps() was assigned to a string
and silently interpreted as a single-character filename with a funny
value. Fix with the intent: assign the filename.
o in libparse.cc, an int was assigned to a string, but depending on
visible constructors, this is ambiguous. Explicitly cast this to
a char.
2019-05-14 22:01:15 -07:00
whitequark
c8c1df23a0
bugpoint: check for -script option.
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Fixes #925 .
2019-05-14 10:48:06 +00:00
Clifford Wolf
8166a142dd
Fix handling of glob_abort_cnt in opt_muxtree, fixes #1002
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-12 13:51:12 +02:00
Clifford Wolf
faf00586d8
Merge pull request #1003 from makaimann/zinit-all
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Zinit option '-singleton' -> '-all'
2019-05-11 13:56:51 +02:00
Clifford Wolf
b66b657b6b
Add "fmcombine -initeq -anyeq"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-11 09:28:55 +02:00
Clifford Wolf
04ef222cfb
Add "stat -tech xilinx"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-11 09:24:52 +02:00
Makai Mann
2f5cfa014b
Zinit option '-singleton' -> '-all'
2019-05-10 10:23:14 -07:00
Jakob Wenzel
f06cb75b93
initialize more registers in setundef -init
2019-05-09 12:47:16 +02:00
Clifford Wolf
3870e7cf29
Merge pull request #991 from kristofferkoch/gcc9-warnings
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Fix all warnings that occurred when compiling with gcc9
2019-05-08 11:25:22 +02:00
Kristoffer Ellersgaard Koch
30c762d3a1
Fix all warnings that occurred when compiling with gcc9
2019-05-08 10:27:14 +02:00
Clifford Wolf
a76189e7ad
More opt_clean cleanups
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-07 14:41:58 +02:00
Clifford Wolf
752553d8e9
Merge pull request #946 from YosysHQ/clifford/specify
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Add specify parser
2019-05-06 20:57:15 +02:00
Clifford Wolf
1706798f4e
Merge pull request #975 from YosysHQ/clifford/fix968
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Re-enable "final loop assignment" feature and fix opt_clean warnings
2019-05-06 20:53:38 +02:00
Clifford Wolf
7bab7b3d49
Merge pull request #871 from YosysHQ/verific_import
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Improve verific -chparam and add hierarchy -chparam
2019-05-06 20:51:59 +02:00
Clifford Wolf
d187be39d6
Merge branch 'master' of github.com:YosysHQ/yosys into clifford/fix968
2019-05-06 15:41:13 +02:00
Clifford Wolf
b37c31e2cb
Bugfix in peepopt_shiftmul.pmg
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 15:34:19 +02:00
Clifford Wolf
c0782d8390
Merge pull request #989 from YosysHQ/dave/abc_name_improve
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ABC name recovery fixes
2019-05-06 13:57:35 +02:00
Clifford Wolf
f02e22a35a
Fix bug in "expose -input"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 13:30:55 +02:00
Clifford Wolf
ba6ce21a74
Cleanups in opt_clean
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 12:45:22 +02:00
Clifford Wolf
c7f2e93024
Merge branch 'master' of github.com:YosysHQ/yosys into clifford/specify
2019-05-06 11:46:10 +02:00
David Shah
a84256aa36
abc: Fix handling of postfixed names (e.g. for retiming)
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Signed-off-by: David Shah <dave@ds0.me>
2019-05-04 17:23:44 +01:00
David Shah
5ce9113eda
abc: Improve name recovery
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Signed-off-by: David Shah <dave@ds0.me>
2019-05-04 16:53:25 +01:00
Clifford Wolf
a01386c0e4
Improve opt_clean handling of unused wires
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-04 09:47:16 +02:00
Eddie Hung
d9c4644e88
Merge remote-tracking branch 'origin/master' into clifford/specify
2019-05-03 15:05:57 -07:00
Clifford Wolf
ec39cfd0ad
Add "hierarchy -chparam" support for non-verific top modules
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-03 22:03:43 +02:00
Eddie Hung
eb21bf3651
log_warning_noprefix -> log_warning as per review
2019-05-03 20:53:25 +02:00
Eddie Hung
a27b42e975
WIP -chparam support for hierarchy when verific
2019-05-03 20:53:25 +02:00
Clifford Wolf
373b236108
Merge pull request #969 from YosysHQ/clifford/pmgenstuff
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Improve pmgen, Add "peepopt" pass with shift-mul pattern
2019-05-03 20:39:50 +02:00
Clifford Wolf
f170fb6383
Merge pull request #984 from YosysHQ/eddie/fix_982
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dffinit to do nothing when (* init *) value is 1'bx
2019-05-03 20:34:32 +02:00
Eddie Hung
e08df0c739
If init is 1'bx, do not add to dict as per @cliffordwolf
2019-05-03 08:06:16 -07:00
Eddie Hung
fc349de033
Revert "dffinit -noreinit to silently continue when init value is 1'bx"
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This reverts commit aa081f83c7
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2019-05-03 08:05:37 -07:00
Clifford Wolf
42190207b4
Improve opt_expr and opt_clean handling of (partially) undriven and/or unused wires, fixes #981
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-03 14:25:01 +02:00