whitequark
763401fc82
ecp5: do not map FFRAM if explicitly requested otherwise.
2020-04-03 05:51:40 +00:00
whitequark
ebee746ad2
ice40: do not map FFRAM if explicitly requested otherwise.
2020-04-03 05:51:40 +00:00
whitequark
e0def9e4d9
memory_map: add -attr option, to respect inference attributes.
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Before this commit, memory_map (which is always a part of a synth
script) would always pick up any $mem cell that was not processed
by a preceding pass and lower it down to $dff/$mux cells.
This is undesirable for two reasons:
* If there is an explicit inference attribute set on a $mem cell,
e.g. (* ram_block *), then it is arguably incorrect to map such
a memory to $dff/$mux cells.
* If memory_map tries to lower a memory that was intended to
be mapped to a large BRAM, it often takes extraordinarily long
time to finish, produces an extremely large log file, and outputs
an unusable design.
After this commit, properly invoked memory_map will not map any
memory that has an explicit inference attribute specified, solving
the first issue, and alleviating the second. The default behavior
is not changed.
2020-04-03 05:51:40 +00:00
Eddie Hung
cf716e1fff
Merge pull request #1853 from YosysHQ/eddie/fix_dynslice
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ast: cap dynamic range select to size of signal, suppresses warnings
2020-04-02 12:27:10 -07:00
Eddie Hung
5f662b1c43
Merge pull request #1767 from YosysHQ/eddie/idstrings
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IdString: use more ID::*, make them easier to use, speed up IdString::in()
2020-04-02 11:47:25 -07:00
Eddie Hung
956ecd48f7
kernel: big fat patch to use more ID::*, otherwise ID(*)
2020-04-02 09:51:32 -07:00
Marcin Kościelnicki
0ed1062557
simcells.v: Generate the fine FF cell types by a python script.
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This makes adding more FF types in the future much more manageable.
Fixes #1824 .
2020-04-02 18:37:15 +02:00
Claire Wolf
c69f4b246a
Merge pull request #1846 from dh73/ast_fe
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Adding error message for when size (width) of number literal is zero
2020-04-02 18:15:15 +02:00
Marcin Kościelnicki
2d3753d730
iopadmap: Fix z assignment to inout port
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Fixes #1841 .
2020-04-02 18:15:04 +02:00
Claire Wolf
22ef5701c0
Merge pull request #1842 from YosysHQ/mwk/fix-deminout-xz
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deminout: prevent any constant assignment from demoting to input
2020-04-02 18:14:34 +02:00
Eddie Hung
2d86563bb2
kernel: IdString::in(const IdString &) as per @Tjoppen
2020-04-02 07:14:08 -07:00
Eddie Hung
18d85b88ae
kernel: fix formatting (thanks @boqwxp)
2020-04-02 07:14:08 -07:00
Eddie Hung
7bcbf0c9d1
kernel: use C++11 fold hack to prevent recursion
2020-04-02 07:14:08 -07:00
Eddie Hung
ba13a40ef4
Revert "kernel: IdString:in() to use perfect forwarding"
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This reverts commit 7b2a85aedf24affc2e1202c78e70e6a317f5bf29.
2020-04-02 07:14:08 -07:00
Eddie Hung
dde3dfd72e
Update backends/btor/btor.cc; credit @boqwxp
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Co-Authored-By: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com>
2020-04-02 07:14:08 -07:00
Eddie Hung
6d4f01c3fa
kernel: separate IdString::put_reference() out to help inlining
2020-04-02 07:14:08 -07:00
Eddie Hung
4a8cecf03e
kernel: IdString:in() to use perfect forwarding
2020-04-02 07:14:08 -07:00
Eddie Hung
fdafb74eb7
kernel: use more ID::*
2020-04-02 07:14:08 -07:00
Eddie Hung
164dd0f6b2
kernel: Use constids.inc for global/constant IdStrings
2020-04-02 07:14:08 -07:00
Eddie Hung
37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
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kernel: speedup by using more pass-by-const-ref
2020-04-02 07:13:33 -07:00
Claire Wolf
3477749459
Bump YOSYS_VER
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-04-02 15:40:00 +02:00
Claire Wolf
d1fc4321f0
Merge pull request #1770 from YosysHQ/claire/btor_symbols
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Improve write_btor symbol handling
2020-04-02 15:38:47 +02:00
Claire Wolf
104c004e6d
Merge pull request #1765 from YosysHQ/claire/btor_info
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Add info-file and cover features to write_btor
2020-04-02 15:38:27 +02:00
Claire Wolf
8b7610c48b
Merge pull request #1777 from YosysHQ/claire/manyhot
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Using LFSR counter for ezSAT::manyhot()
2020-04-02 14:31:33 +02:00
Claire Wolf
65a3ff69bd
Improve ezsat onehot encoding scheme
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-04-02 12:22:28 +02:00
Claire Wolf
f72b65b2a5
Using LFSR counter for ezSAT::manyhot()
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The only user of this API right now is the puzzle3d benchmark and
it sees a slight reduction in CNF size from this, but the performance
difference is within the noise of measurement on my system.
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-04-02 11:37:12 +02:00
Eddie Hung
c90324662c
Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup
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kernel: share a single CellTypes within a pass
2020-04-01 14:17:45 -07:00
Eddie Hung
4ae7f3a8ed
Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor
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opt_expr: optimise $xor/$xnor/$_XOR_/$_XNOR_ -s with constant inputs
2020-04-01 14:17:01 -07:00
Eddie Hung
e79bc45975
Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu
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opt_expr: improve performance on $alu and $sub
2020-04-01 14:11:09 -07:00
David Shah
f3405e7c79
Merge pull request #1844 from YosysHQ/dave/gen-source-loc
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verilog: Add location info for generate constructs
2020-04-01 20:55:24 +01:00
Eddie Hung
d8dd842c09
Merge pull request #1852 from boqwxp/cleanup_synth_ice40
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Fix indentation in `techlibs/ice40/synth_ice40.cc`.
2020-04-01 11:18:38 -07:00
David Shah
c3997c77a5
verilog: Add location info for generate constructs
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Signed-off-by: David Shah <dave@ds0.me>
2020-04-01 18:47:20 +01:00
Eddie Hung
c22fb76664
ast: cap dynamic range select to size of signal, suppresses warnings
2020-04-01 09:59:23 -07:00
Eddie Hung
86380e0212
Merge pull request #1849 from boqwxp/cleanup_kernel_yosys
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Clean up pseudo-private member usage in `kernel/yosys.cc`.
2020-04-01 09:35:35 -07:00
Eddie Hung
903cec84f4
Merge pull request #1850 from boqwxp/cleanup_backends
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Cleanup pseudo-private member usage and outdated `RTLIL::id2cstr()` in backends
2020-04-01 09:34:02 -07:00
Alberto Gonzalez
fc6b898178
Fix indentation in `techlibs/ice40/synth_ice40.cc`.
2020-04-01 16:29:56 +00:00
Alberto Gonzalez
c23c2c59c1
Update `RTLIL::id2cstr()` usage to `log_id`.
2020-04-01 06:53:28 +00:00
Claire Wolf
926a010b49
Merge pull request #1848 from YosysHQ/eddie/fix_dynslice
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ast: simplify to fully populate dynamic slicing case transformation
2020-04-01 08:38:14 +02:00
Alberto Gonzalez
cdb14652be
Clean up pseudo-private member usage in `backends/intersynth/intersynth.cc`.
2020-04-01 06:32:09 +00:00
Alberto Gonzalez
24ef73904f
Clean up pseudo-private member usage in `backends/blif/blif.cc`.
2020-04-01 05:50:48 +00:00
Alberto Gonzalez
f657fed24c
Clean up pseudo-private member usage in `backends/verilog/verilog_backend.cc`.
2020-04-01 05:25:10 +00:00
Alberto Gonzalez
68c0e3562e
Clean up pseudo-private member usage in `backends/spice/spice.cc`.
2020-04-01 04:56:52 +00:00
Alberto Gonzalez
057976c323
Clean up pseudo-private member usage in `backends/edif/edif.cc`.
2020-04-01 04:37:07 +00:00
Alberto Gonzalez
68fef4ca7f
Clean up pseudo-private member usage in `backends/ilang/ilang_backend.cc`.
2020-04-01 03:08:39 +00:00
Alberto Gonzalez
ae05795f54
Clean up pseudo-private member usage in `kernel/yosys.cc`.
2020-04-01 02:53:56 +00:00
Eddie Hung
1bb5a5215f
Merge pull request #1761 from YosysHQ/eddie/opt_merge_speedup
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opt_merge: speedup
2020-03-31 14:50:32 -07:00
Eddie Hung
5132f4099b
ast: simplify to fully populate dynamic slicing case transformation
2020-03-31 11:52:14 -07:00
Eddie Hung
3df66027e0
Add dynamic slicing Verilog testcase
2020-03-31 11:51:31 -07:00
Diego H
c859bcf71b
Replacing log_error for log_file_error due consistency
2020-03-31 12:01:29 -06:00
Diego H
92809bb1d3
Adding error message for when size (width) of number literal is zero
2020-03-30 17:18:13 -06:00